mask.

llvm-svn: 48750

- SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.

llvm-svn: 48746

llvm-svn: 48743

llvm-svn: 48739

llvm-svn: 48738

field to store the alignment value instead of haing a
separate field.

llvm-svn: 48727

llvm-svn: 48726

Increasing the inline limit from (overly conservative) 200 to 300. Given each BB costs 20 and each instruction costs 5, 200 means a 4 BB function + 24 instructions (actually less because caller's size also contributes to it).

Furthermore, double the limit when more than 10% of the callee instructions are vector instructions. Multimedia kernels tend to love inlining.

llvm-svn: 48725

llvm-svn: 48720

With this pass, StrongPHIElim can compile very simple testcases correctly.  There's still a ways
to go before it's ready for prime time, though.

llvm-svn: 48719

Transform (zext (or (icmp), (icmp))) to (or (zext (cimp), (zext icmp))) if at least one of the (zext icmp) can be transformed to eliminate an icmp.

llvm-svn: 48715

llvm-svn: 48714

llvm-svn: 48711

llvm-svn: 48710

llvm-svn: 48708

llvm-svn: 48707

llvm-svn: 48706

llvm-svn: 48704

llvm-svn: 48703

of compiler used.

llvm-svn: 48702

llvm-svn: 48701

Force stack alignment to 16 bytes on win targets.

llvm-svn: 48695

llvm-svn: 48694

llvm-svn: 48692

llvm-svn: 48691

llvm-svn: 48690

llvm-svn: 48688

llvm-svn: 48687

llvm-svn: 48686

llvm-svn: 48685

llvm-svn: 48684

llvm-svn: 48683

llvm-svn: 48682

This fires dozens of times across spec and multisource, but I don't know
if it actually speeds stuff up.  Hopefully the testers will show something
nice :)

llvm-svn: 48680

llvm-svn: 48679

llvm-svn: 48677

llvm-svn: 48676

llvm-svn: 48673

merging optimization.  Nothing to see here, hopefully more later :)

llvm-svn: 48670

adding <map> to many files that actually do need it.

llvm-svn: 48667