do not double-count the duplicate instructions by counting once from the
beginning and again from the end.  Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end.  Radar 8589805.

This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction.  That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.

llvm-svn: 117333

instructions separately from the count of non-predicated instructions.  The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.

llvm-svn: 117332

llvm-svn: 117329

Do not count use of sdisel for single call instruction.

llvm-svn: 117316

Add counters to count how many basic blocks are entirely selected by fastisel.

llvm-svn: 117310

Add simple counter to count no. of basic blocks without any line number information. At -O0, these basic block coule cause less than optimial debugging experience.

llvm-svn: 117307

llvm-svn: 117272

name and prefixed with 'LLVM_'.

llvm-svn: 117203

was found by a GCC warning. ;]

llvm-svn: 117199

2) live-outs.

Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.

llvm-svn: 117193

of all predecessors.

llvm-svn: 117191

llvm-svn: 117180

framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.

llvm-svn: 117174

llvm-svn: 117170

When a block has exactly two uses and the register is both live-in and live-out,
don't isolate the block. We would be inserting two copies, so we haven't really
made any progress.

If the live-in and live-out values separate into disconnected components after
splitting, we would be making progress. We can't detect that for now.

llvm-svn: 117169

llvm-svn: 117155

llvm-svn: 117151

An exit block with a critical edge must only have predecessors in the loop, or
just before the loop. This guarantees that the inserted copies in the loop
predecessors dominate the exit block.

llvm-svn: 117144

llvm-svn: 117143

X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!

This is needed for indirect calls.

llvm-svn: 117061

Parent - union(Y, ...). Doh.

llvm-svn: 117042

unconditional branch.

llvm-svn: 117041

(gcc-4.6 warning).

llvm-svn: 117022

(gcc-4.6 warns about these).

llvm-svn: 117021

This should be the minimum set of functions that could possibly need it.

llvm-svn: 116978

llvm-svn: 116962

- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.

llvm-svn: 116956

llvm-svn: 116951

types are no longer Legal on X86, we don't need it.
No functional change.  8499854.

llvm-svn: 116947

operand, also check if subregisters are killed.

Add <imp-def> operands for subregisters that remain alive after a super register
is killed.

I don't have a testcase for this that reproduces on trunk. <rdar://problem/8441758>

llvm-svn: 116940

llvm-svn: 116890

setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

llvm-svn: 116879

Pull an unsigned out of the Contents union such that it has the same size as two
pointers and no padding.

Arrange members such that the Contents union and all pointers can be 8-byte
aligned without padding.

This speeds up code generation by 0.8% on a 64-bit host. 32-bit hosts should be
unaffected.

llvm-svn: 116857

erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

llvm-svn: 116845

Get rid of static constructors for pass registration.  Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820

is", which breaks some nightly tests.

llvm-svn: 116816

lib/CodeGen/TargetLoweringObjectFileImpl.cpp: Tweak to emit ".{section}${name}" instead of ".{section}$linkonce_{name}" for linkonce sections.

It seems GNU ld/PECOFF relies on section names, linking with g++'s libstdc++.a would fail.

llvm-svn: 116791

in MultiSource/Benchmarks/VersaBench/beamformer/beamformer.
SmallSet.insert returns true if the element is inserted.

llvm-svn: 116790

  "long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.

llvm-svn: 116781

llvm-svn: 116750