disassembler never recognizes InitReg instructions.

llvm-svn: 97017

llvm-svn: 96923

Needed to correctly handle things like 'llvmc -framework Foo foo.o -framework
Bar bar.o' - before this commit all '-framework' options would've been grouped
together in the beginning.

Due to our dependence on CommandLine this turned out to be a giant hack; we will
migrate away from CommandLine eventually.

llvm-svn: 96922

Does not work, but the infrastructure changes are in place.

llvm-svn: 96920

For now, just enough support to make -filelist work.

llvm-svn: 96918

llvm-svn: 96916

llvm-svn: 96908

llvm-svn: 96906

input/output patterns have the same type.  It turns out that 
this triggers all the time because we don't infer types 
between these boundaries.  Until we do, don't turn this on.

llvm-svn: 96905

of a pattern and where the uses have different types.

llvm-svn: 96904

this is tidier and can find bugs.

llvm-svn: 96900

but not in the input.  Previously, this would trigger an abort
late in the isel logic.

llvm-svn: 96898

llvm-svn: 96896

llvm-svn: 96891

llvm-svn: 96889

llvm-svn: 96845

VBR encoding for the insanity being perpetrated by the spu backend. 

llvm-svn: 96843

ridiculously ginormous patterns and need more than one byte
of displacement for encodings.  This fixes CellSPU/fdiv.ll.
SPU is still doing something else ridiculous though.

llvm-svn: 96833

well as the operands produced when the pattern is matched.  This
allows CheckSame to work correctly when matching replicated 
names involving ComplexPatterns.  This fixes a bunch of MSP430 
failures, we're down to 13 failures, two of which are
due to a sched bug.

llvm-svn: 96824

has one of the list of acceptable opcodes for a complex 
pattern.  This fixes 4 regtest failures.

llvm-svn: 96814

sure to only run the complex pattern on nodes where the target opts in.
This patch only handles targets with one opcode specified so far, but
fixes 16 failures, only 34 left.

llvm-svn: 96813

result nodes correctly.  Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without 
eliminating (parallel) from input patterns.  That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.

llvm-svn: 96767

DAGISelEmitter does.  This fixes 11 arm failures (8 
left).

llvm-svn: 96757

least cost matches.  This gets us from 195 -> 208 passes on the ppc codegen tests.

llvm-svn: 96747

llvm-svn: 96730

With this, the matcher actually works reasonably well, but
crashes on larger examples in the scheduler.

llvm-svn: 96727

body before the push.

llvm-svn: 96726

llvm-svn: 96725

of the matched pattern to use the newly created node results.  Onto
the "making it actually work" phase!

llvm-svn: 96724

the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization 
etc).

More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.

In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.

llvm-svn: 96716

llvm-svn: 96663

llvm-svn: 96661

llvm-svn: 96639

llvm-svn: 96636

building the tree to represent them but not emitting 
table entries for them yet.

llvm-svn: 96617

Nothing real here yet.

llvm-svn: 96575

relationship, this is a linear list relationship.

llvm-svn: 96561

field to MatcherNode.

llvm-svn: 96560

llvm-svn: 96541

llvm-svn: 96497