Commits · 9e369f2a510a6f3b014fd8e6e2dd5e054f7735e9 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Feb 06, 2016
- [X86][SSE] Don't replace an existing 32-bit load with its duplicate · 9e369f2a
  Simon Pilgrim authored Feb 06, 2016
  9e369f2a
- Comment fix · 11e4d114
  Simon Pilgrim authored Feb 06, 2016
  11e4d114
- [AArch64] Add the scheduling model for Exynos-M1 · d761ca23
  Evandro Menezes authored Feb 06, 2016
  d761ca23
Feb 05, 2016
- [AArch64] Refactoring aarch64-ldst-opt. NCF. · 1de2d44d
  Jun Bum Lim authored Feb 05, 2016
  1de2d44d
- AMDGPU: Account for LDS alignment · 7f83397d
  Matt Arsenault authored Feb 05, 2016
  7f83397d
- AMDGPU: Preserve alignments on new created globals · cf84e26f
  Matt Arsenault authored Feb 05, 2016
  cf84e26f
- AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo · 1242ce96
  Tom Stellard authored Feb 05, 2016
  1242ce96
- AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructors · 5dde1d2e
  Tom Stellard authored Feb 05, 2016
  5dde1d2e
- AMDGPU/SI: Correctly initialize SIInsertWaits pass · 6e1967ef
  Tom Stellard authored Feb 05, 2016
  6e1967ef
- [WebAssembly] Update the select instructions' operand orders to match the spec. · d46b0926
  Dan Gohman authored Feb 05, 2016
  d46b0926
- Fix for PR 26193 · d389c7a3
  Nemanja Ivanovic authored Feb 05, 2016
  d389c7a3
- Move classes defined in a cpp file into an anonymous namespace. · 85c824f1
  Benjamin Kramer authored Feb 05, 2016
  85c824f1
- Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3)." · 6274e522
  Renato Golin authored Feb 05, 2016
  6274e522
- Fix for PR 26356 · b6fdce4c
  Nemanja Ivanovic authored Feb 04, 2016
  b6fdce4c
Feb 04, 2016
- [AArch64] Bound the number of instructions we scan when searching for updates. · 35706ad6
  Chad Rosier authored Feb 04, 2016
  35706ad6
- [X86][SSE] Select domain for 32/64-bit partial loads for EltsFromConsecutiveLoads · 7823fd25
  Simon Pilgrim authored Feb 04, 2016
  7823fd25
- [AArch64] Improve load/store optimizer to handle LDUR + LDR (take 3). · 05f8020c
  Chad Rosier authored Feb 04, 2016
  05f8020c
- [AArch64] Multiply extended 32-bit ints with `[U|S]MADDL' · 33b3bd17
  Silviu Baranga authored Feb 04, 2016
  33b3bd17
- [X86][SSE] Add general 32-bit LOAD + VZEXT_MOVL support to EltsFromConsecutiveLoads · 6788f33c
  Simon Pilgrim authored Feb 04, 2016
  6788f33c
- Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR." · 18896c0f
  Chad Rosier authored Feb 04, 2016
  18896c0f
- AVX-512: Fixed a bug in FMA instruction selection on KNL · 86528270
  Elena Demikhovsky authored Feb 04, 2016
  86528270
- [AArch64] Improve load/store optimizer to handle LDUR + LDR. · feec2aeb
  Chad Rosier authored Feb 04, 2016
  feec2aeb
- [AVX512] add vfmadd132ss and vfmadd132sd Intrinsic · 7d733604
  Michael Zuckerman authored Feb 04, 2016
  7d733604
- [X86] Moved SEXT -> SIGN_EXTEND_VECTOR_INREG combine into helper. NFC. · 1d2d6c5a
  Simon Pilgrim authored Feb 04, 2016
  1d2d6c5a
- [X86] Use hash table in LEA optimization pass. · bca0f992
  Andrey Turetskiy authored Feb 04, 2016
  bca0f992
- [NVPTX] Disable performance optimizations when OptLevel==None · f650441b
  Jingyue Wu authored Feb 04, 2016
  f650441b
Feb 03, 2016
- clean up; NFC · 460ce9cd
  Sanjay Patel authored Feb 03, 2016
  460ce9cd
- ARM: support TLS for WoA · f36005a3
  Saleem Abdulrasool authored Feb 03, 2016
  f36005a3
- [ARM] Move GNUEABI divmod to __aeabi_divmod* · 6027dd38
  Renato Golin authored Feb 03, 2016
  6027dd38
- [mips] Remove redundant inclusions of MipsAnalyzeImmediate.h · 3b1a2dbf
  Daniel Sanders authored Feb 03, 2016
  3b1a2dbf
- Fix for PR 26381 · 82e11689
  Nemanja Ivanovic authored Feb 03, 2016
  82e11689
- [mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sections · e774126c
  Simon Atanasyan authored Feb 03, 2016
  e774126c
- [X86][AVX] Add support for 64-bit VZEXT_LOAD of 256/512-bit vectors to EltsFromConsecutiveLoads · 18bcf93e
  Simon Pilgrim authored Feb 03, 2016
  18bcf93e
- Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates. · d62d8b77
  Kyle Butt authored Feb 03, 2016
  d62d8b77
- Revert r259576: Disable the vzeroupper insertion pass on PS4. · eb959722
  Yunzhong Gao authored Feb 03, 2016
  eb959722
Feb 02, 2016
- Disable the vzeroupper insertion pass on PS4. · b76ccacf
  Yunzhong Gao authored Feb 02, 2016
  b76ccacf
- AMDGPU: Do not promote allocas with non-inbounds GEPs · de420812
  Matt Arsenault authored Feb 02, 2016
  de420812
- AMDGPU: Handle promoting memmove · 7e747f1a
  Matt Arsenault authored Feb 02, 2016
  7e747f1a
- [X86] Fix the merging of SP updates in prologue/epilogue insertions. · b8fb2ba1
  Quentin Colombet authored Feb 02, 2016
  b8fb2ba1
- AMDGPU: Skip promote alloca with no optimizations · 8b175672
  Matt Arsenault authored Feb 02, 2016
  8b175672