a testcase I'm about to attach to that pr.

llvm-svn: 68592

 - Complete <rdar://problem/6635883> Support __objc_exception__
   attribute

llvm-svn: 68591

Pointer width on targets like PIC16 is 16-bit, while the valid index size to GEP is only 32 or 64. So promote index to 32 in such cases.

llvm-svn: 68590

llvm-svn: 68589

abstraction for CommandLine.

llvm-svn: 68588

llvm-svn: 68587

llvm-svn: 68586

"The attached patch generates warnings of cases where an ObjC message is sent to
a nil object and the size of return type of that message is larger than the size
of void pointer. This may result in undefined return values as described in PR
2718.  The patch also includes test cases."

llvm-svn: 68585

 - Add -pic-level clang-cc option to specify the value for the define,
   updated driver to pass this.

 - Added __pic__

 - Added OBJC_ZEROCOST_EXCEPTIONS define while I was here (to match gcc).

llvm-svn: 68584

llvm-svn: 68583

llvm-svn: 68582

llvm-svn: 68580

using an lea in place of a mov and an add for this test.

llvm-svn: 68579

avoiding sign extension for the top octet.  For "negative" chars, we'd print
stuff like:

.asciz	"\702...
now we print:
.asciz	"\302...

llvm-svn: 68577

with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.

llvm-svn: 68576

llvm-svn: 68570

llvm-svn: 68569

llvm-svn: 68568

llvm-svn: 68561

builds.

--- Reverse-merging (from foreign repository) r68552 into '.':
U    test/CodeGen/X86/tls8.ll
U    test/CodeGen/X86/tls10.ll
U    test/CodeGen/X86/tls2.ll
U    test/CodeGen/X86/tls6.ll
U    lib/Target/X86/X86Instr64bit.td
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86CodeEmitter.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86InstrInfo.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86ISelLowering.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/X86/X86InstrBuilder.h
U    lib/Target/X86/X86RegisterInfo.td

llvm-svn: 68560

Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also.

llvm-svn: 68559

multiple instances of an option.

Also, removed direct -ansi support from clang-cc.

llvm-svn: 68558

llvm-svn: 68557

 - Groups are really just intended to hold inherent structure of the
   options, not be abused for individual tool argument translation.

llvm-svn: 68554

-isysroot to clang.
 - Don't forward arbitrary -i* options to clang, just the ones we know
   about.

llvm-svn: 68553

This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.

llvm-svn: 68552

we must not issue gc-specific errors in non-gc mode.

llvm-svn: 68551

clang.
 - We will eventually want some more driver infrastructre for this
   probably.

 - For now, the clang-cc interface stays relatively the same, but we
   don't accept multiple instances anymore, or the [no-] variants
   directly.

llvm-svn: 68550

llvm-svn: 68549

llvm-svn: 68548

SelectionDAG do those. This fixes PR3955.

llvm-svn: 68546

When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.

llvm-svn: 68545

llvm-svn: 68544

llvm-svn: 68543

llvm-svn: 68542

functions.  Fixes PR3941.

llvm-svn: 68541

aren't failing the compilation).

llvm-svn: 68540

 - <rdar://problem/6756295> warning about '-dynamic' argument unused
   during compilation seems incorrect

llvm-svn: 68535

llvm-svn: 68534

llvm-svn: 68533