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  1. Feb 12, 2013
    • Kay Tiong Khoo's avatar
      Added 0x0D to 2-byte opcode extension table for prefetch* variants · ab588efe
      Kay Tiong Khoo authored
      Fixed decode of existing 3dNow prefetchw instruction
      Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs
      
      llvm-svn: 174920
      ab588efe
    • Hal Finkel's avatar
      BBVectorize: Don't over-search when building the dependency map · 6ae564b4
      Hal Finkel authored
      When building the pairable-instruction dependency map, don't search
      past the last pairable instruction. For large blocks that have been
      divided into multiple instruction groups, searching past the last
      instruction in each group is very wasteful. This gives a 32% speedup
      on the csa.ll test case from PR15222 (when using 50 instructions
      in each group).
      
      No functionality change intended.
      
      llvm-svn: 174915
      6ae564b4
    • Hal Finkel's avatar
      BBVectorize: Omit unnecessary entries in PairableInstUsers · 39a95032
      Hal Finkel authored
      This map is queried only for instructions in pairs of pairable
      instructions; so make sure that only pairs of pairable
      instructions are added to the map. This gives a 3.5% speedup
      on the csa.ll test case from PR15222.
      
      No functionality change intended.
      
      llvm-svn: 174914
      39a95032
  2. Feb 11, 2013
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