llvm-svn: 48148

Patch by Erick Tryzelaar.

llvm-svn: 48147

llvm-svn: 48146

return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145

llvm-svn: 48143

llvm-svn: 48142

- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.                                                                                                 
 A = or A, B                                                                                                                                                            
 ...                                                                                                                                                                    
 B = A                                                                                                                                                                  
 ...                                                                                                                                                                    
 C = A<kill>                                                                                                                                                            
 ...                                                                                                                                                                    
   = B                                                                                                                                                                  
                                                                                                                                                                        
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.

llvm-svn: 48141

llvm-svn: 48140

Patch by Joachim Durchholz. Thanks!

llvm-svn: 48139

Move StrongPHIElimination after live interval analysis.  This will make things happier down the road.

llvm-svn: 48138

llvm-svn: 48137

Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.

llvm-svn: 48136

llvm-svn: 48135

the build system.  Patch by Joachim Durchholz  for PR2121

llvm-svn: 48134

llvm-svn: 48133

before compile_c.  Patch by Joachim Durchholz!

llvm-svn: 48132

Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130

llvm-svn: 48128

llvm-svn: 48126

Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!

llvm-svn: 48125

llvm-svn: 48123

field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122

llvm-svn: 48121

two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll

llvm-svn: 48120

cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking.

llvm-svn: 48119

llvm-svn: 48118

llvm-svn: 48117

llvm-svn: 48116

- "Redefinition of I" (iterator masks previous definition)
- include missing header file

Patch by Argiris Kirtzidis!

llvm-svn: 48115

llvm-svn: 48112

llvm-svn: 48111

llvm-svn: 48110

llvm-svn: 48109

they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
	%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
	ret double %tmp85
}

from:

_test2:
	subl	$20, %esp
	# InlineAsm Start
	fld0
	# InlineAsm End
	fstpl	8(%esp)
	movsd	8(%esp), %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$20, %esp
	#FP_REG_KILL
	ret

to:

_test2:
	# InlineAsm Start
	fld0
	# InlineAsm End
	#FP_REG_KILL
	ret

by avoiding a f64 <-> f80 trip

llvm-svn: 48108

an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107

llvm-svn: 48106

in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)

llvm-svn: 48105

RST -> RFP{32/64/80}.  We only handle ST(0) for now.

llvm-svn: 48104

llvm-svn: 48103

llvm-svn: 48101