%S5<def> = COPY %S0<kill>
First clear def map of Q1, etc.

No small test case available.

llvm-svn: 151574

ecx = mov eax
al  = mov ch
The second copy is not a nop because the sub-indices of ecx,ch is not the
same of that of eax/al.

Re-enabled machine-cp.
PR11940

llvm-svn: 151002

This does make a difference, at least when using RABasic.

llvm-svn: 150118

For simplicity, treat calls with register masks as basic block
boundaries.  This means we can't copy propagate callee-saved registers
across calls, but I don't think that is a big deal.

llvm-svn: 150108

Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

llvm-svn: 150100

llvm-svn: 150094

The live range of the source register may be extended when a redundant
copy is eliminated. Make sure any kill flags between the two copies are
cleared.

This fixes PR11765.

llvm-svn: 149069

safely proven not to have been clobbered. No small test case possible.

llvm-svn: 147751

opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
        movl    %eax, %ecx
        movl    %ecx, %eax
        ret

The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)

This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.

rdar://10428165
rdar://10640363

llvm-svn: 147716