combined to an insert_subreg, i.e., where the destination register is larger
than the source.  We need to check that the subregs can be composed for that
case in a symmetrical way to the case when the destination is smaller.

llvm-svn: 106004

Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

llvm-svn: 105998

Given a copy instruction, CoalescerPair can determine which registers to
coalesce in order to eliminate the copy. It deals with all the subreg fun to
determine a tuple (DstReg, SrcReg, SubIdx) such that:

- SrcReg is a virtual register that will disappear after coalescing.
- DstReg is a virtual or physical register whose live range will be extended.
- SubIdx is 0 when DstReg is a physical register.
- SrcReg can be joined with DstReg:SubIdx.

CoalescerPair::isCoalescable() determines if another copy instruction is
compatible with the same tuple. This fixes some NEON miscompilations where
shuffles are getting coalesced as if they were copies.

The CoalescerPair class will replace a lot of the spaghetti logic in JoinCopy
later.

llvm-svn: 105997

llvm-svn: 105994

replacing the overly conservative checks that I had introduced recently to
deal with correctness issues.  This makes a pretty noticable difference
in our testcases where reg_sequences are used.  I've updated one test to
check that we no longer emit the unnecessary subreg moves.

llvm-svn: 105991

llvm-svn: 105990

llvm-svn: 105988

llvm-svn: 105987

containing the target address, an input, into an output.  I don't
think this actually broke anything on x86 (it does on ARM), but
it's wrong.

llvm-svn: 105986

the combined load/store instruction. rdar://7797940

llvm-svn: 105982

llvm-svn: 105971

llvm-svn: 105970

immediate" operands.  These functions have so far only been used for VMOV
but they also apply to other NEON instructions with modified immediate
operands.  No functional changes.

llvm-svn: 105969

Make sure to skip the dbg_value instructions when moving dups out of the
diamond. rdar://7797940

llvm-svn: 105965

llvm-svn: 105962

- Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it.

llvm-svn: 105959

llvm-svn: 105956

llvm-svn: 105955

symbols as declarations in the X86 backend.  This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:

symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression

This fixes PR7353.

llvm-svn: 105954

llvm-svn: 105953

llvm-svn: 105952

fixes PR7356.

llvm-svn: 105950

llvm-svn: 105949

llvm-svn: 105944

llvm-svn: 105943

llvm-svn: 105942

Radar 7894069.

llvm-svn: 105938

more clear what exactly is missing.

llvm-svn: 105934

llvm-svn: 105933

Patch by Patrick Flannery!

llvm-svn: 105932

llvm-svn: 105929

llvm-svn: 105915

llvm-svn: 105914

llvm-svn: 105913

Add code for generating bits of semachecking

llvm-svn: 105907

llvm-svn: 105900

tests: Run macho-dump with binary unbuffered streams on Windows, I can't find a Python 2.6 way to change stdin to binary.

llvm-svn: 105894

llvm-svn: 105891

llvm-svn: 105890

llvm-svn: 105888