Commits · 0acc024d7a065f58cfe8bf727e4df36af35952b4 · Roger Ferrer / llvm-epi · GitLab

Jun 06, 2018
- [InstCombine] add tests for another abs() pattern (PR36036); NFC · 6fda6b12
  Sanjay Patel authored Jun 06, 2018
  6fda6b12
- AMDGPU: Custom lower v2f16 fneg/fabs with illegal f16 · e9524f1f
  Matt Arsenault authored Jun 06, 2018
  e9524f1f
- [llvm-strip] Expose --discard-all option · 29407f3a
  Alexander Shaposhnikov authored Jun 06, 2018
  29407f3a
- [InstCombine] PR37603: low bit mask canonicalization · cbf84463
  Roman Lebedev authored Jun 06, 2018
  cbf84463
- [InstCombine][NFC] PR37603: low bit mask canonicalization tests · 4771bc6c
  Roman Lebedev authored Jun 06, 2018
  4771bc6c
- [X86] Emit BZHI when mask is ~(-1 << nbits)) · 488d28d4
  Roman Lebedev authored Jun 06, 2018
  488d28d4
- [NFC][X86][AArch64] Reorganize/cleanup BZHI test patterns · cb56f7a5
  Roman Lebedev authored Jun 06, 2018
  cb56f7a5
- [Hexagon] Implement vector-pair zero as V6_vsubw_dv · c1e712ba
  Krzysztof Parzyszek authored Jun 06, 2018
  c1e712ba
- [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 are used as the index. · ef813a52
  Craig Topper authored Jun 06, 2018
  ef813a52
- [X86][BtVer2] Add support for all vector instructions that should match the... · aef5bdbe
  Simon Pilgrim authored Jun 06, 2018
  aef5bdbe
- [Debugify] Move debug value intrinsics closer to their operand defs · 6d354ed7
  Vedant Kumar authored Jun 06, 2018
  6d354ed7
- [Debugify] Add a quiet mode to suppress warnings · a9e27312
  Vedant Kumar authored Jun 06, 2018
  a9e27312
- [AArch64, ARM] Add support for Samsung Exynos M4 · b2c82447
  Evandro Menezes authored Jun 06, 2018
  b2c82447
- Fix the test case that places intermediate in source directory. · 2c5d2ea8
  Han Shen authored Jun 06, 2018
  2c5d2ea8
- guard fsqrt with fmf sub flags · cc1c4b69
  Michael Berg authored Jun 06, 2018
  cc1c4b69
- [llvm-mca][x86] Fix all resources-x86_64.s tests to use different registers in reg-reg cases · 7a48bb6e
  Simon Pilgrim authored Jun 06, 2018
  7a48bb6e
- [Hexagon] Split CTPOP of vector pairs · 0da1fe37
  Krzysztof Parzyszek authored Jun 06, 2018
  0da1fe37
- [ConstProp] move tests for fp <--> int; NFC · 0e8b90da
  Sanjay Patel authored Jun 06, 2018
  0e8b90da
- [X86][BtVer2] Add tests for all vector instructions that should match the... · 64541ff2
  Simon Pilgrim authored Jun 06, 2018
  64541ff2
- [GlobalMerge] Set the alignment on merged global structs · 25312b2b
  David Green authored Jun 06, 2018
  25312b2b
- [mips] Add testcase for i64, i128 addition for the DSP ASE · 9b1182ac
  Simon Dardis authored Jun 06, 2018
  9b1182ac
- InstCombine: ignore debug instructions during fence combine · 9b80060d
  Tim Northover authored Jun 06, 2018
  9b80060d
- [mips] Partially revert r334031 · 0bba0df8
  Simon Dardis authored Jun 06, 2018
  0bba0df8
- [X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042) · 3d141588
  Simon Pilgrim authored Jun 06, 2018
  3d141588
- [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup · 57f661bd
  Peter Smith authored Jun 06, 2018
  57f661bd
- [MIPS GlobalISel] Add lowerCall · 326ec324
  Petar Jovanovic authored Jun 06, 2018
  326ec324
- [CodeGen] assume max/default throughput for unspecified instructions · 59313be8
  Sanjay Patel authored Jun 05, 2018
  59313be8
Jun 05, 2018
- [CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions · c4c6b548
  Guozhi Wei authored Jun 05, 2018
  c4c6b548
- AMDGPU: Preserve metadata when widening loads · 57e541e8
  Matt Arsenault authored Jun 05, 2018
  57e541e8
- AMDGPU: Use more custom insert/extract_vector_elt lowering · 9224c00d
  Matt Arsenault authored Jun 05, 2018
  9224c00d
- [Hexagon] Add pattern to generate 64-bit neg instruction · b984ffcc
  Krzysztof Parzyszek authored Jun 05, 2018
  b984ffcc
- [Hexagon] Add more patterns for generating abs/absp instructions · d8b093ef
  Krzysztof Parzyszek authored Jun 05, 2018
  d8b093ef
- guard fneg with fmf sub flags · 96925fe0
  Michael Berg authored Jun 05, 2018
  96925fe0
- NFC: adding baseline fneg case for fmf · 8f6d6c81
  Michael Berg authored Jun 05, 2018
  8f6d6c81
- [mips] Fix the predicates for arithmetic operations · 0d95ff03
  Simon Dardis authored Jun 05, 2018
  0d95ff03
- [llvm-mca] Correctly update the CyclesLeft of a register read in the presence... · 757600bc
  Andrea Di Biagio authored Jun 05, 2018
  757600bc
- [X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets. · f2f043ac
  Simon Pilgrim authored Jun 05, 2018
  f2f043ac
- [MC][X86] Allow assembler variable assignment to register name. · 05b58910
  Nirav Dave authored Jun 05, 2018
  05b58910
- DAG: Stop dropping invariant/dereferencable · 191bc715
  Matt Arsenault authored Jun 05, 2018
  191bc715
- [InstCombine] Correct the cmp operand type used when canonicalizing abs/nabs · e4ff0bd4
  John Brawn authored Jun 05, 2018
  e4ff0bd4