Commits · 2060895c9ce71bba5a950827167f23ae9eb6eef5 · Roger Ferrer / llvm-epi · GitLab

Nov 07, 2021
- [BasicAA] Use index size instead of pointer size · a8c318b5
  Nikita Popov authored Oct 23, 2021
  a8c318b5
- [AMDGPU] Remove unused declaration selectSMRD (NFC) · aee86f9b
  Kazu Hirata authored Nov 07, 2021
  aee86f9b
- [ARM, X86] Use MachineBasicBlock::{predecessors,successors} (NFC) · 41ef3187
  Kazu Hirata authored Nov 07, 2021
  
  41ef3187
- [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC · d391e4fe
  Simon Pilgrim authored Nov 07, 2021
  d391e4fe
- Put implementation details into anonymous namespaces. NFCI. · 9b8b1645
  Benjamin Kramer authored Nov 07, 2021
  
  9b8b1645
- [X86][AVX] Add missing X86ISD::VBROADCAST(v4f32 -> v8f32) isel pattern for AVX1 targets · b5ef56f0
  Simon Pilgrim authored Nov 07, 2021
  b5ef56f0
- [WebAssembly] Remove unused declaration SelectExternRefAddr (NFC) · 22e21da4
  Kazu Hirata authored Nov 06, 2021
  
  22e21da4
- [AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC) · e4bab218
  Kazu Hirata authored Nov 06, 2021
  
  e4bab218
Nov 06, 2021
- [X86] Simplify a call to MachineBasicBlock::erase (NFC) · cefc01fa
  Kazu Hirata authored Nov 06, 2021
  
  cefc01fa
- [Hexagon] Remove an extraneous variable (NFC) · 815e8b5a
  Kazu Hirata authored Nov 06, 2021
  
  815e8b5a
- [Target] Use llvm::reverse (NFC) · 14d656b3
  Kazu Hirata authored Nov 06, 2021
  
  14d656b3
- [NFC][TTI] Add/extract `getReplicationShuffleCost()` method, deduplicate it's implementations · f8efc5c0
  Roman Lebedev authored Nov 06, 2021
  f8efc5c0
- [RISCV]: Fix typo by abstracting VWholeLoad* classes · 54d891a7
  Bin Cheng authored Nov 04, 2021
  54d891a7
- [RISCV][NFC]: Refactor classes for load/store instructions of RVV · d488f1ff
  Bin Cheng authored Nov 04, 2021
  d488f1ff
Nov 05, 2021
- [AArch64][GISel] Optimize 8 and 16 bit variants of uaddo. · f64580f8
  Florian Hahn authored Nov 05, 2021
  f64580f8
- [RISCV] Support Zfhmin extension · 5c3d7184
  Shao-Ce SUN authored Nov 06, 2021
  5c3d7184
- [Target] Use make_early_inc_range (NFC) · 2c4ba3e9
  Kazu Hirata authored Nov 05, 2021
  
  2c4ba3e9
- [X86] `X86TTIImpl::getInterleavedMemoryOpCostAVX512()`: mask is i8 not i1 · ad617183
  Roman Lebedev authored Nov 05, 2021
  ad617183
- [AArch64] Add target DAG combine for UUNPKHI/LO · 657a1dcd
  David Sherwood authored Nov 04, 2021
  657a1dcd
- [NFC] Inclusive language: Remove instances of master in URLs · c71fbdd8
  Quinn Pham authored Nov 03, 2021
  c71fbdd8
- [AArch64] Fix a bug from a pattern for uaddv(uaddlp(x)) ==> uaddlv · a7b18725
  Jingu Kang authored Nov 05, 2021
  a7b18725
- [X86] Enable v32i16 rotate lowering on non-BWI targets · 5e9ac7c0
  Simon Pilgrim authored Nov 05, 2021
  5e9ac7c0
- [PowerPC] use correct selection for v16i8/v8i16 splat load · fed2889f
  Chen Zheng authored Nov 05, 2021
  fed2889f
- [AMDGPU] NFC formatting fixes in SIMemoryLegalizer · c93bf53a
  Jay Foad authored Nov 05, 2021
  
  c93bf53a
- [PowerPC] Add intrinsic to convert between ppc_fp128 and fp128 · 5fd406e2
  Qiu Chaofan authored Nov 05, 2021
  5fd406e2
- [PowerPC] address post-commit comments for D106555; NFC · 96950270
  Chen Zheng authored Nov 05, 2021
  96950270
- [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var · be08e452
  Shengchen Kan authored Nov 03, 2021
  be08e452
- BPF: Support btf_type_tag attribute · 41860e60
  Yonghong Song authored Oct 17, 2021
  41860e60
Nov 04, 2021
- [ORC] Add a utility for adding missing "self" relocations to a Symbol · a2639dcb
  Ben Langmuir authored Nov 02, 2021
  a2639dcb
- [AMDGPU] Changes the AMDGPU_Gfx calling convention by making the SGPRs 4..29... · 76cbe622
  Thomas Symalla authored Oct 25, 2021
  76cbe622
- [ARM] Move VPTBlock pass after post-ra scheduling · 09124402
  David Green authored Nov 04, 2021
  09124402
- [WebAssembly] Fix debug locations for ExplicitLocals pass · a320f877
  Wouter van Oortmerssen authored Oct 25, 2021
  a320f877
- [RISCV] Rename some assembler mnemonic and intrinsic functions for RVV 1.0. · 0649dfeb
  Zakk Chen authored Nov 04, 2021
  0649dfeb
- [Hexagon] Use make_early_inc_range (NFC) · 2887117d
  Kazu Hirata authored Nov 04, 2021
  
  2887117d
- [NFC] Remove from UnivariateLinearPolyBase::getValue(). · 1ea42962
  Sander de Smalen authored Nov 04, 2021
  1ea42962
- [PowerPC][NFC] make option ppc-formprep-max-vars can be set more than one time. · f6db18fd
  Chen Zheng authored Nov 04, 2021
  
  f6db18fd
- [X86][SSE] Improve PMADDWD SimplifyDemandedVectorElts handling · 87d5bb66
  Simon Pilgrim authored Nov 04, 2021
  87d5bb66
- [PowerPC] Enforce side effects to FPSCR read/set intrinsics · a8411875
  Qiu Chaofan authored Nov 04, 2021
  a8411875
- [AMDGPU] Do not add debug locations to the code inside prologue · 539f500e
  RamNalamothu authored Nov 03, 2021
  539f500e
Nov 03, 2021
- [RISCV] Use HasVInstructions and HasVInstructionsAnyF in more place in TableGen. NFC · 5022ac07
  Craig Topper authored Nov 03, 2021
  5022ac07