Commits · 2aa34bbe22e9f426c2a2a3aca74503e0747a58dd · Roger Ferrer / llvm-epi · GitLab

Oct 07, 2021
- Fix naming and avoid lamba duplication · 2aa34bbe
  Lorenzo Albano authored Oct 01, 2021
  
  2aa34bbe
- Add VP_FPTOUI SDNode · 14370a79
  Lorenzo Albano authored Oct 01, 2021
  
  14370a79
- Add VP_FPTOSI SDNode · e3a439b2
  Lorenzo Albano authored Oct 01, 2021
  
  e3a439b2
- Add VP_UITOFP SDNode · 2af07388
  Lorenzo Albano authored Oct 01, 2021
  
  2af07388
- Add VP_SITOFP SDNode · 3a16215e
  Lorenzo Albano authored Oct 01, 2021
  
  3a16215e
Oct 06, 2021
- Add VP_PTRTOINT and VP_INTTOPTR SDNodes · 05770deb
  Lorenzo Albano authored Oct 05, 2021
  
  05770deb
- Correctly lower VP_PTRTOINT and VP_INTTOPTR to EPI intrinsics · 42ac1304
  Lorenzo Albano authored Oct 06, 2021
  
  42ac1304
Oct 05, 2021
- [RISCV] Update to vlm.v and vsm.v according to v1.0-rc1. · 80a64563
  Hsiangkai Wang authored Oct 05, 2021
  80a64563
Oct 02, 2021
- Revert "[RISCV] Add an GPR def to the Zvlseg SPILL/RELOAD pseudos" · 33d20977
  Craig Topper authored Oct 02, 2021
  33d20977
Oct 01, 2021
- [RISCV][NFC] Reformat a line of frame lowering code · 52c60459
  Fraser Cormack authored Oct 01, 2021
  
  52c60459
- [RISCV][NFC] Add closing parentheses to frame layout comments · fcaa64d9
  Fraser Cormack authored Oct 01, 2021
  
  fcaa64d9
Sep 30, 2021
- [RISCV] Remove Zbproposedc extension · a21c5579
  Craig Topper authored Sep 30, 2021
  a21c5579
- Add VP_TRUNC and VP_FPTRUNC SDNodes · ac1403f4
  Lorenzo Albano authored Sep 30, 2021
  
  ac1403f4
Sep 29, 2021
- Add support for VP_FPEXT SDNode · f732cd83
  Lorenzo Albano authored Sep 29, 2021
  
  f732cd83
Sep 28, 2021
- Fixes with recent merge · 257e009d
  Roger Ferrer authored Sep 28, 2021
  
  257e009d
Sep 27, 2021
- [RISCV] Fold store of vmv.x.s to a vse with VL=1. · a2a07e8d
  Craig Topper authored Sep 27, 2021
  a2a07e8d
- [RISCV] Improve support for forming widening multiplies when one input is a scalar splat. · 933182e9
  Craig Topper authored Sep 27, 2021
  933182e9
- [RISCV] Create the correct mask type when lowering EXTRACT_VECTOR_ELT · d48f6df1
  Fraser Cormack authored Sep 24, 2021
  d48f6df1
Sep 26, 2021
- [RISCV] Remove redundant declaration RISCVMnemonicSpellCheck (NFC) · c4ae4a74
  Kazu Hirata authored Sep 26, 2021
  c4ae4a74
Sep 25, 2021
- [RISCV] Fix incorrect operand type of inst alias for InstR4 · ed687c02
  Jim Lin authored Sep 25, 2021
  ed687c02
- [RISCV] Add another isel optimization for (and (shl X, c2), c1). · 715cf6ff
  Craig Topper authored Sep 24, 2021
  715cf6ff
Sep 24, 2021
- [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics. · 7d39a8a9
  Hsiangkai Wang authored Sep 02, 2021
  7d39a8a9
- [RISCV] Limit transformAddImmMulImm to prevent an infinite loop. · 40b230f6
  Craig Topper authored Sep 23, 2021
  40b230f6
Sep 23, 2021
- [RISCV] Add another isel optimization for (and (shl x, c2), c1) · 70f50114
  Craig Topper authored Sep 23, 2021
  70f50114
- [RISCV] Add more isel optimizations for (and (shr x, c2), c1). · 4a69551d
  Craig Topper authored Sep 23, 2021
  4a69551d
- [RISCV] Add missing op type OPERAND_UIMM2, OPERAND_UIMM3 and OPERAND_UIMM7 for verifyInstruction · fbacf5ad
  Jim Lin authored Sep 23, 2021
  fbacf5ad
- [RISCV][VP] Add support for VP_REDUCE_* operations · e7c879a6
  Fraser Cormack authored Aug 05, 2021
  e7c879a6
- [TII] Remove the MFI argument to convertToThreeAddress. NFC. · 6cef28ed
  Jay Foad authored Sep 22, 2021
  6cef28ed
Sep 22, 2021
- [RISCV] Add fcvt.s.w(u)/fcvt.d.w(u)/fcvt.h.w(u) to hasAllNBitUsers · f0a422f9
  Craig Topper authored Sep 22, 2021
  f0a422f9
- [RISCV] Optimize vp.store with an all ones mask to avoid a vmset. · b33a1cc0
  Craig Topper authored Sep 22, 2021
  b33a1cc0
Sep 21, 2021
- [RISCV] Make some arrays of constants 'static const'. NFC · 7c975665
  Craig Topper authored Sep 21, 2021
  7c975665
- Add VP_SEXT and VP_ZEXT support · 57fa9614
  Lorenzo Albano authored Sep 21, 2021 and Roger Ferrer committed Sep 21, 2021
  
  57fa9614
- [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for and/or/xor. · aeb63d46
  Craig Topper authored Sep 21, 2021
  aeb63d46
- Add VP_SELECT support · 2d1f5909
  Lorenzo Albano authored Sep 21, 2021
  
  2d1f5909
- [RISCV] Optimize (add (mul x, c0), c1) · b3052013
  Ben Shi authored Sep 19, 2021
  b3052013
Sep 20, 2021
- [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FMA. · a95ba810
  Craig Topper authored Sep 20, 2021
  a95ba810
- [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FAdd/FSub/FMul/FDiv. · 04ab6c85
  Craig Topper authored Sep 20, 2021
  
  04ab6c85
- [RISCV] Add a pass to recognize VLS strided loads/store from gather/scatter. · d85e347a
  Craig Topper authored Sep 20, 2021
  d85e347a
Sep 19, 2021
- [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD · dee5a8ca
  Ben Shi authored Aug 30, 2021
  dee5a8ca
Sep 17, 2021
- Add vp_icmp and vp_fcmp VP SDNodes and lower them using SDAGs · af675411
  Lorenzo Albano authored Sep 16, 2021
  
  af675411