- Sep 30, 2019
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Djordje Todorovic authored
This reverts commit rL373183. llvm-svn: 373200
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Guillaume Chatelet authored
llvm-svn: 373199
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Simon Pilgrim authored
The static analyzer is warning about potential null dereferences, but in these cases we should be able to use castAs<> directly and if not assert will fire for us. llvm-svn: 373198
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Haojian Wu authored
Summary: This patch implements another version header-source switch by incorporating the AST and index, it will be used: - to improve the current header-source switch feature (layer with the existing file heuristic); - by the incoming define-outline code action; Reviewers: kadircet Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67907 llvm-svn: 373197
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Guillaume Chatelet authored
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68201 llvm-svn: 373196
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Guillaume Chatelet authored
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet, jdoerfert Subscribers: hiraditya, asbirlea, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D68142 llvm-svn: 373195
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Raphael Isemann authored
This somehow caused that 'frame select X' ends up being interpreted as 'frame select -r 1' when 'up' or 'down' were run before 'frame select X'. See rdar://55791276. Partly reverting to unbreak master. The changes that aren't reverted are the generic 'frame select -r' tests that are obviously NFC and test existing behavior. llvm-svn: 373194
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Raphael Isemann authored
Summary: The ExternalASTMerger should use the ASTImporterSharedState. This allows it to handle std::pair in LLDB (but the rest of libc++ is still work in progress). Reviewers: martong, shafik, a.sidorin Subscribers: rnkovacs, christof, JDevlieghere, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D68140 llvm-svn: 373193
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Sam Parker authored
Add some loop tests that cover different float operations and types. llvm-svn: 373192
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Hans Wennborg authored
llvm-svn: 373191
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Hans Wennborg authored
llvm-svn: 373190
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Djordje Todorovic authored
llvm-svn: 373189
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Sam Parker authored
The VCTP instruction will calculate the predicate masked based upon the number of elements that need to be processed. I had inserted the sub before the vctp intrinsic and supplied it as the operand, but this is incorrect as the phi should directly feed the vctp. The sub is calculating the value for the next iteration. Differential Revision: https://reviews.llvm.org/D67921 llvm-svn: 373188
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Roger Ferrer Ibanez authored
ISD::SADDO uses the suggested sequence described in the section §2.4 of the RISCV Spec v2.2. ISD::SSUBO uses the dual approach but checking for (non-zero) positive. Differential Revision: https://reviews.llvm.org/D47927 llvm-svn: 373187
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Sam Parker authored
As we perform a zext on any arguments used in the promoted tree, it doesn't matter if they're marked as signext. The only permitted user(s) in the tree which would interpret the sign bits are signed icmps. For these instructions, their promoted operands are truncated before the icmp uses them. Differential Revision: https://reviews.llvm.org/D68019 llvm-svn: 373186
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Tim Northover authored
The motivating SCEV change was reverted as incorrect. llvm-svn: 373185
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Tim Northover authored
This reverts r366419 because the analysis performed is within the context of the loop and it's only valid to add wrapping flags to "global" expressions if they're always correct. llvm-svn: 373184
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Djordje Todorovic authored
The tool reports verbose output for the DWARF debug location coverage. The llvm-locstats for each variable or formal parameter DIE computes what percentage from the code section bytes, where it is in scope, it has location description. The line 0 shows the number (and the percentage) of DIEs with no location information, but the line 100 shows the number (and the percentage) of DIEs where there is location information in all code section bytes (where the variable or parameter is in the scope). The line 50..59 shows the number (and the percentage) of DIEs where the location information is in between 50 and 59 percentage of its scope covered. Differential Revision: https://reviews.llvm.org/D66526 llvm-svn: 373183
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Jonas Paulsson authored
SystemZPostRewrite needs to be run before (it may emit COPYs) the Post-RA pseudo pass also at -O0, so it should be added in addPostRegAlloc(). Review: Ulrich Weigand llvm-svn: 373182
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Craig Topper authored
These are all also implemented in avx512_logical_lowering_types with support for masking. llvm-svn: 373181
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Matt Arsenault authored
llvm-svn: 373180
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Fangrui Song authored
llvm-svn: 373179
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Fangrui Song authored
llvm-svn: 373178
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Craig Topper authored
[X86] Split v16i32/v8i64 bitreverse on avx512f targets without avx512bw to enable the use of vpshufb on the 256-bit halves. llvm-svn: 373177
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Aditya Kumar authored
Summary: Reviewers: t.p.northover Subscribers: Differential Revision: https://reviews.llvm.org/D46378 llvm-svn: 373176
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Fangrui Song authored
llvm-svn: 373175
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Craig Topper authored
This was added back to allow some performance regressions to be investigated. The main perf issue was fixed shortly after adding this back and no other major issues have been reported. So I think its safe to remove this again. llvm-svn: 373174
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- Sep 29, 2019
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Richard Smith authored
value-dependent initializer. llvm-svn: 373173
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Craig Topper authored
There's room from improvement here, but this is a decent starting point. There are a few minor regressions in the vector-rotate tests, where we are now forming a vpternlog from an and before we get a chance to form it for a bitselect that we were matching previously. This results in an AND and an ANDN feeding the vpternlog where previously we just had an AND after the vpternlog. I think we can probably DAG combine the AND with the bitselect to get back to similar codegen. llvm-svn: 373172
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Amaury Sechet authored
llvm-svn: 373171
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Aditya Kumar authored
MergeFunctions and DCE pass are missing from OCaml/C-api. This patch adds them. Differential Revision: https://reviews.llvm.org/D65071 Reviewers: whitequark, hiraditya, deadalnix Reviewed By: whitequark Subscribers: llvm-commits Tags: #llvm Authored by: kren1 llvm-svn: 373170
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DeForest Richards authored
Moves existing article links on the Programming, Subsystem, and Reference documentation pages to new locations. Also moves Github Repository and Publications links to the sidebar. llvm-svn: 373169
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Fangrui Song authored
For the following two cases, we currently suppress the symbols. This patch emits them (compatible with GNU as). * `test2_a = undef`: if `undef` is otherwise unused. * `.hidden hidden`: if `hidden` is unused. This is the main point of the patch, because omitting the symbol would cause a linker semantic difference. It causes a behavior change that is not compatible with GNU as: .weakref foo1, bar1 When neither foo1 nor bar1 is used, we now emit bar1, which is arguably more consistent. Another change is that we will emit .TOC. for .TOC.@tocbase . For this directive, suppressing .TOC. can be seen as a size optimization, but we choose to drop it for simplicity and consistency. llvm-svn: 373168
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Roman Lebedev authored
[DivRemPairs] Don't assert that we won't ever get expanded-form rem pairs in different BB's (PR43500) If we happen to have the same div in two basic blocks, and in one of those we also happen to have the rem part, we'd match the div-rem pair, but the wrong ones. So let's drop overly-ambiguous assert. Fixes https://bugs.llvm.org/show_bug.cgi?id=43500 llvm-svn: 373167
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Alexey Bataev authored
[SLP] Fix for PR31847: Assertion failed: (isLoopInvariant(Operands[i], L) && "SCEVAddRecExpr operand is not loop-invariant!") Initially SLP vectorizer replaced all going-to-be-vectorized instructions with Undef values. It may break ScalarEvaluation and may cause a crash. Reworked SLP vectorizer so that it does not replace vectorized instructions by UndefValue anymore. Instead vectorized instructions are marked for deletion inside if BoUpSLP class and deleted upon class destruction. Reviewers: mzolotukhin, mkuper, hfinkel, RKSimon, davide, spatel Subscribers: RKSimon, Gerolf, anemet, hans, majnemer, llvm-commits, sanjoy Differential Revision: https://reviews.llvm.org/D29641 llvm-svn: 373166
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Paul Hoad authored
Summary: The following code ``` struct f { template <class T> void bar() && noexcept {} }; ``` will be formatted to the following with LLVM style, and `AlwaysBreakTemplateDeclarations: Yes` ``` struct f { template <class T> void bar() && noexcept {} }; ``` The indentation of the `void bar()` line is wrong. Reviewers: klimek, owenpan, krasimir, timwoj, MyDeveloperDay Reviewed By: klimek, MyDeveloperDay Subscribers: MyDeveloperDay, ilya-biryukov, llvm-commits, cfe-commits Patch By: AndWass Tags: #clang-format, #clang, #llvm Differential Revision: https://reviews.llvm.org/D68072 llvm-svn: 373165
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Jinsong Ji authored
Summary: g++ build emits warning: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:667:77: error: suggest parentheses around ?&&? within ?||? [-Werror=parentheses] assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress() && ~~~~~~~~~~~~~~~~~~~~^~ "Unexpected operand type for LWZtoc pseudo."); I believe the intension is to assert all different types, so we should add a parentheses to include all '||'. Reviewers: #powerpc, sfertile, hubert.reinterpretcast, Xiangling_L Reviewed By: Xiangling_L Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, shchenz, steven.zhang, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68180 llvm-svn: 373164
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David Green authored
This is an attempt to fill in some of the missing instructions from the Cortex-M4 schedule, and make it easier to do the same for other ARM cpus. - Some instructions are marked as hasNoSchedulingInfo as they are pseudos or otherwise do not require scheduling info - A lot of features have been marked not supported - Some WriteRes's have been added for cvt instructions. - Some extra instruction latencies have been added, notably by relaxing the regex for dsp instruction to catch more cases, and some fp instructions. This goes a long way to get the CompleteModel working for this CPU. It does not go far enough as to get all scheduling info for all output operands correct. Differential Revision: https://reviews.llvm.org/D67957 llvm-svn: 373163
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Richard Smith authored
llvm-svn: 373162
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Richard Smith authored
constexpr) destructors from being used in the values of constexpr variables. The standard rules here are unclear at best, so rejecting the problematic cases seems prudent. Prior to this change, we would fail to run the destructors for these temporaries, even if they had side-effects, which is certainly not the right behavior. llvm-svn: 373161
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