Commits · b5ef56f0bc9b51bd026a643d4a541af9993aaf89 · Roger Ferrer / llvm-epi · GitLab

Nov 07, 2021
- [X86][AVX] Add missing X86ISD::VBROADCAST(v4f32 -> v8f32) isel pattern for AVX1 targets · b5ef56f0
  Simon Pilgrim authored Nov 07, 2021
  b5ef56f0
- [X86] Add AVX512 test coverage to vselect-zero.ll · f7880a78
  Simon Pilgrim authored Nov 07, 2021
  f7880a78
Nov 06, 2021
- [InstSimplify] Remove incorrect icmp of gep fold (PR52429) · e3cec17b
  Nikita Popov authored Nov 06, 2021
  e3cec17b
- [NFC][X86][Costmodel] Add tests for i32/i64 replication shuffles · 23566f18
  Roman Lebedev authored Nov 06, 2021
  23566f18
- [Test][SLPVectorizer] Precommit test for PR52275 · 1c2ad70f
  Anton Afanasyev authored Nov 06, 2021
  
  1c2ad70f
- [TTI][CostModel] `getUserCost()`: recognize replication shuffles and query their cost · a30ec477
  Roman Lebedev authored Nov 06, 2021
  a30ec477
- [InstCombine] match usub.sat from umax intrinsic · 83c2fb9f
  Sanjay Patel authored Nov 05, 2021
  83c2fb9f
- [InstCombine] add tests for umax with sub; NFC · 025a2f73
  Sanjay Patel authored Nov 05, 2021
  
  025a2f73
- DebugInfo: Simplified Template Names: drop unneeded space in arrays · 0a5c26f2
  David Blaikie authored Nov 05, 2021
  0a5c26f2
- [llvm-profgen] Fix index out of bounds error while using ip.advance · 5bf191a3
  wlei authored Nov 04, 2021
  5bf191a3
Nov 05, 2021
- DWARF Simplified Template Names: Narrow down the handling for operator overloads · f57d0e27
  David Blaikie authored Nov 05, 2021
  f57d0e27
- [SCEV] Use constant range of RHS to prove NUW on narrow IV in trip count logic · d24a0e88
  Philip Reames authored Nov 05, 2021
  d24a0e88
- [NFC][CostModel] Add exhaustive test coverage for replication shuffles · 04fa7cbf
  Roman Lebedev authored Nov 06, 2021
  04fa7cbf
- [TwoAddressInstructionPass] Update existing physreg live intervals · bdaa1810
  Jay Foad authored Nov 04, 2021
  bdaa1810
- Autogen tests for ease of future update · e69f6476
  Philip Reames authored Nov 05, 2021
  
  e69f6476
- [DAGCombiner] add fold for vselect based on mask of signbit, part 2 · 7e30404c
  Sanjay Patel authored Nov 05, 2021
  7e30404c
- [AArch] add tests for vselect; NFC · 4d513f25
  Sanjay Patel authored Nov 05, 2021
  4d513f25
- [x86] add tests for vector select; NFC · fc852462
  Sanjay Patel authored Nov 05, 2021
  
  fc852462
- Reland "[Attr] support btf_type_tag attribute" · 3466e007
  Yonghong Song authored Nov 05, 2021
  3466e007
- [AArch64][GISel] Optimize 8 and 16 bit variants of uaddo. · f64580f8
  Florian Hahn authored Nov 05, 2021
  f64580f8
- [RISCV] Support Zfhmin extension · 5c3d7184
  Shao-Ce SUN authored Nov 06, 2021
  5c3d7184
- [llvm-readobj] Display DT_RELRSZ/DT_RELRENT as " (bytes)" · 26a8ceba
  Fangrui Song authored Nov 05, 2021
  26a8ceba
- Add NoOpLoopNestPass and LOOPNEST_PASS macro · 93421108
  Whitney Tsang authored Nov 05, 2021
  93421108
- [RISCV] Enable FP extensions and ABI on fixed-vectors-bitcast.ll. · 085accea
  Craig Topper authored Nov 04, 2021
  085accea
- [InstCombine] Generalize sadd.sat combine to compute sign bits. · 08056e18
  David Green authored Nov 05, 2021
  08056e18
- [X86] `X86TTIImpl::getInterleavedMemoryOpCostAVX512()`: mask is i8 not i1 · ad617183
  Roman Lebedev authored Nov 05, 2021
  ad617183
- [DAGCombiner] add fold for vselect based on mask of signbit · 4fc1fc40
  Sanjay Patel authored Nov 05, 2021
  4fc1fc40
- [AArch64] add tests for vector select; NFC · 1e7afa2a
  Sanjay Patel authored Nov 04, 2021
  
  1e7afa2a
- [x86] add tests for vector select; NFC · 89188140
  Sanjay Patel authored Nov 04, 2021
  
  89188140
- [InstCombine] add signbit tests for icmp with trunc; NFC · 05f64b5a
  Sanjay Patel authored Nov 03, 2021
  
  05f64b5a
- [AArch64] Add target DAG combine for UUNPKHI/LO · 657a1dcd
  David Sherwood authored Nov 04, 2021
  657a1dcd
- [AArch64] Fix a bug from a pattern for uaddv(uaddlp(x)) ==> uaddlv · a7b18725
  Jingu Kang authored Nov 05, 2021
  a7b18725
- [FreeBSD] Do not mark __stack_chk_guard as dso_local · 1cb9f37a
  Alfredo Dal'Ava Junior authored Nov 05, 2021
  1cb9f37a
- [DAG] FoldConstantArithmetic - fold bitlogic(bitcast(x),bitcast(y)) -> bitcast(bitlogic(x,y)) · c1e7911c
  Simon Pilgrim authored Nov 05, 2021
  c1e7911c
- [InstCombine] Add additional tests for converting to sadd.sat with sign bits. NFC · cd8cb537
  David Green authored Nov 05, 2021
  
  cd8cb537
- [X86] Enable v32i16 rotate lowering on non-BWI targets · 5e9ac7c0
  Simon Pilgrim authored Nov 05, 2021
  5e9ac7c0
- [ARM] Extra MVE constant select test. NFC · cb62c376
  David Green authored Nov 05, 2021
  
  cb62c376
- [PowerPC] use correct selection for v16i8/v8i16 splat load · fed2889f
  Chen Zheng authored Nov 05, 2021
  fed2889f
- Revert "[TwoAddressInstructionPass] Update existing physreg live intervals" · 0321bd64
  Jay Foad authored Nov 05, 2021
  0321bd64
- [TwoAddressInstructionPass] Update existing physreg live intervals · ec0e1e88
  Jay Foad authored Nov 04, 2021
  ec0e1e88