Commits · b7cac864b212ecd5a09487beee5ad5b5ca2918df · Roger Ferrer / llvm-epi · GitLab

Aug 19, 2021
- [mlir] Fix typo in SuperVectorizer · b7cac864
  Diego Caballero authored Aug 18, 2021
  b7cac864
- [LLDB][GUI] Add Process Launch form · 82507f17
  Omar Emara authored Aug 18, 2021
  82507f17
- [clang-format] Improve detection of parameter declarations in K&R C · 643f2be7
  owenca authored Aug 15, 2021
  643f2be7
- [LLDB][GUI] Fix text field incorrect key handling · 698e2106
  Omar Emara authored Aug 18, 2021
  698e2106
Aug 18, 2021
- [gn build] Port d8bbfe8a · a0ed4494
  LLVM GN Syncbot authored Aug 18, 2021
  
  a0ed4494
- [DWARF] Expose raw bytes in DWARFExpression · d8bbfe8a
  Rafael Auler authored Aug 04, 2021
  d8bbfe8a
- Enables inferring return types for Shape op if possible · 41e5dbe0
  Chia-hung Duan authored Aug 18, 2021
  41e5dbe0
- [AArch64][GlobalISel] Don't allow s128 for G_ISNAN · c22b64ef
  Jessica Paquette authored Aug 18, 2021
  c22b64ef
- gn build: Build libclang.so and libLTO.so on ELF platforms. · b2e77cd0
  Peter Collingbourne authored Nov 23, 2020
  b2e77cd0
- [AArch64][GlobalISel] Mark G_FMINNUM/G_FMAXNUM as floating point opcodes · 3d91d5b7
  Jessica Paquette authored Aug 17, 2021
  3d91d5b7
- [AArch64][GlobalISel] Legalize scalar G_FMINNUM + G_FMAXNUM · 45e1a6bd
  Jessica Paquette authored Aug 17, 2021
  45e1a6bd
- [libomptarget][devicertl] Replace lanemask with uint64 at interface · 21d91a8e
  Jon Chesterfield authored Aug 18, 2021
  21d91a8e
- [AggressiveInstCombine] Add logical shift right instr to `TruncInstCombine` DAG · cfb6dfcb
  Anton Afanasyev authored Aug 17, 2021
  cfb6dfcb
- [Test][AggressiveInstCombine] Add one more tests for shifts · 2498c3ed
  Anton Afanasyev authored Aug 18, 2021
  
  2498c3ed
- [mlir][tosa] Fix clamp to restrict only within valid bitwidth range · 76c97121
  Robert Suderman authored Aug 18, 2021
  76c97121
- [Polly] Introduce caching for the isErrorBlock function. NFC. · 58e4e71f
  Michael Kruse authored Aug 18, 2021
  58e4e71f
- Reapply: [NFC] factor out unrolling decision logic · cc7bcef3
  Ali Sedaghati authored Aug 18, 2021
  cc7bcef3
- [X86][NFC] Pre-commit tests for PR51494 · 2d53e54f
  Andrea Di Biagio authored Aug 18, 2021
  
  2d53e54f
- [PowerPC] Regenerate 2007-09-08-unaligned.ll test checks · ba1f6ffb
  Simon Pilgrim authored Aug 18, 2021
  
  ba1f6ffb
- [tsan] Disable all Trace unit tests on Mac · b4b8e144
  Azharuddin Mohammed authored Aug 18, 2021
  b4b8e144
- Revert "[NFC] factor out unrolling decision logic" · ffd8a268
  Geoffrey Martin-Noble authored Aug 18, 2021
  ffd8a268
- [AMDGPU] Fix atomic float max/min intrinsics · 9dbc968e
  Joe Nash authored Aug 12, 2021
  9dbc968e
- [hwasan] Don't report short-granule shadow as overwritten. · fd51ab63
  Mitch Phillips authored Aug 18, 2021
  fd51ab63
- [LICM] Remove AST-based implementation · 3dd8c917
  Nikita Popov authored Aug 17, 2021
  3dd8c917
- [NFC] factor out unrolling decision logic · 4d559837
  Ali Sedaghati authored Aug 18, 2021
  4d559837
- [Bazel] Don't set HAVE_[DE]REGISTER_FRAME on Windows · 811dbeca
  Geoffrey Martin-Noble authored Aug 18, 2021
  811dbeca
- [NFC] A couple more removeAttribute() cleanups · fde0eb1f
  Arthur Eubanks authored Aug 18, 2021
  
  fde0eb1f
- [NFC] Remove some unnecessary AttributeList methods · 2fc07594
  Arthur Eubanks authored Aug 18, 2021
  2fc07594
- [hwasan] Flag stack safety check as requiring aarch64 · 2afb9394
  Christopher Tetreault authored Aug 17, 2021
  2afb9394
- [RISCV] Remove sext_inreg+add/sub/mul/shl isel patterns. · 3f9b37cc
  Craig Topper authored Aug 18, 2021
  3f9b37cc
- [GlobalISel] Implement lowering for G_ISNAN + use it in AArch64 · 791006fb
  Jessica Paquette authored Aug 17, 2021
  791006fb
- [NFC][loop-idiom] Rename Stores to IgnoredInsts; Fix a typo · 687f046c
  Han Zhu authored Aug 17, 2021
  687f046c
- [GlobalISel] Add IRTranslator support for G_ISNAN · d9873711
  Jessica Paquette authored Aug 17, 2021
  d9873711
- [InstrProfiling] Support relative CountersPtr for PlatformOther · 66e2772e
  Jinsong Ji authored Aug 18, 2021
  66e2772e
- [RISCV] Insert sext_inreg when type legalizing add/sub/mul with constant LHS. · 6d7ea597
  Craig Topper authored Aug 18, 2021
  6d7ea597
- [GlobalISel] Add G_ISNAN · 0a2b1ba3
  Jessica Paquette authored Aug 17, 2021
  0a2b1ba3
- [Polly] Break early when the result is known. NFC. · e8c8407a
  Michael Kruse authored Aug 18, 2021
  
  e8c8407a
- [RISCV] Improve constant materialization for stores of i16 or i32 negative constants. · 20e62658
  Craig Topper authored Aug 18, 2021
  20e62658
- [RISCV] Teach isel to select ADDW/SUBW/MULW/SLLIW when only the lower 32-bits are used. · d9ba1a9c
  Craig Topper authored Aug 18, 2021
  d9ba1a9c
- [X86] avx512bw-intrinsics-upgrade.ll - cleanup whitespace and use nounwind to... · 6cc11090
  Simon Pilgrim authored Aug 18, 2021
  6cc11090