Commits · ca552b8d31e12d1068bbd3ac01f8b490712596f0 · Roger Ferrer / llvm-epi · GitLab

Mar 01, 2018
- [X86][MMX] Improve handling of 64-bit MMX constants · 90fd0622
  Simon Pilgrim authored Mar 01, 2018
  90fd0622
- [SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants. · eedfbc4a
  Craig Topper authored Mar 01, 2018
  eedfbc4a
- [Hexagon] Add trap1 instruction · c5e0ed10
  Krzysztof Parzyszek authored Mar 01, 2018
  c5e0ed10
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.amdgcn.cvt.pkrtz · 364f12e8
  Matt Arsenault authored Mar 01, 2018
  364f12e8
- AMDGPU/GlobalISel: Define instruction mapping for G_OR · 5320ee4a
  Matt Arsenault authored Mar 01, 2018
  5320ee4a
- AMDGPU/GlobalISel: Remove default register mapping · e65404f5
  Matt Arsenault authored Mar 01, 2018
  e65404f5
- [AArch64] Clean up code (NFC) · 2bbb4a7c
  Evandro Menezes authored Mar 01, 2018
  2bbb4a7c
- AMDGPU/GlobalISel: Use a more correct getValueMapping · 1422a19a
  Matt Arsenault authored Mar 01, 2018
  1422a19a
- AMDGPU/GlobalISel: Define instruction mapping for G_BITCAST · 62669ede
  Matt Arsenault authored Mar 01, 2018
  62669ede
- AMDGPU/GlobalISel: Mark i32->i64 zext as legal · 0529a8e2
  Matt Arsenault authored Mar 01, 2018
  0529a8e2
- [AArch64] Add support for secrel add/load/store relocations for COFF · c61ff3be
  Martin Storsjö authored Mar 01, 2018
  c61ff3be
- AMDGPU/GlobalISel: InstrMapping for llvm.amdgcn.exp.compr · 36b99e19
  Matt Arsenault authored Mar 01, 2018
  36b99e19
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.amdgcn.exp · 8931bbf8
  Matt Arsenault authored Mar 01, 2018
  8931bbf8
- [SimplifyLibCalls] Update an obviously copy and pasted header comment to match this file. NFC · 2915bc00
  Craig Topper authored Mar 01, 2018
  2915bc00
- AMDGPU/GlobalISel: Define InstrMappings for G_ICMP · 50721ab3
  Matt Arsenault authored Mar 01, 2018
  50721ab3
- AMDGPU/GlobalISel: Make i32 mul legal · dc14ec05
  Matt Arsenault authored Mar 01, 2018
  dc14ec05
- AMDGPU/GlobalISel: Define instruction mapping for G_IMPLICIT_DEF · 06cbb27a
  Matt Arsenault authored Mar 01, 2018
  06cbb27a
- AMDGPU/GlobalISel: Define instruction mapping for G_FCONSTANT · e3d9ecf2
  Matt Arsenault authored Mar 01, 2018
  e3d9ecf2
- AMDGPU/GlobalISel: Add copyCost for VGPR->SGPR copies · 51b0b200
  Matt Arsenault authored Mar 01, 2018
  51b0b200
- AMDGPU/GlobalISel: Make i32 xor legal · 3f6a204e
  Matt Arsenault authored Mar 01, 2018
  3f6a204e
- AMDGPU/GlobalISel: Mark 32/64-bit G_FCMP as legal · 8e80a5fb
  Matt Arsenault authored Mar 01, 2018
  8e80a5fb
- AMDGPU/GlobalISel: Mark 32-bit G_FPTOSI as legal · dd022ce0
  Matt Arsenault authored Mar 01, 2018
  dd022ce0
- [WebAssembly] Fix broken gcc build after rL326454 · 503fdea3
  Sam Clegg authored Mar 01, 2018
  503fdea3
- [NVPTX] use pattern matching to lower int_nvvm_match_all_sync*. · 8c9749b1
  Artem Belevich authored Mar 01, 2018
  8c9749b1
- [WebAssembly] Use uint8_t for single byte values to match the spec · 03e101f1
  Sam Clegg authored Mar 01, 2018
  03e101f1
- [PDB] Defer writing the build id until the rest of the PDB is written. · c6a75a69
  Zachary Turner authored Mar 01, 2018
  c6a75a69
- [AMDGPU] : fix for the crash in SIRegisterInfo when the regiser class not found · 0081d23f
  Alexander Timofeev authored Mar 01, 2018
  0081d23f
- [Hexagon] Add guest registers · 22a21d4c
  Krzysztof Parzyszek authored Mar 01, 2018
  22a21d4c
- [Power9] Add missing instructions to the Power 9 scheduler · e894e0ff
  Stefan Pintilie authored Mar 01, 2018
  e894e0ff
- [InstCombine] simplify code for (X*Y) * X => (X*X) * Y ; NFCI · f3b1af7a
  Sanjay Patel authored Mar 01, 2018
  f3b1af7a
- [AArch64] generate vuzp instead of mov · c33af715
  Sebastian Pop authored Mar 01, 2018
  c33af715
- Revert "[DEBUGINFO] Add flag for DWARF2 or less to use sections as references." · d7c6fdbc
  Alexey Bataev authored Mar 01, 2018
  d7c6fdbc
- [CodeGen] fix argument attribute in lowering statepoint/patchpoint · b3d88a74
  Than McIntosh authored Mar 01, 2018
  b3d88a74
- [SCCP] Fix unused variable warning in release builds. · d1cf7ff5
  Benjamin Kramer authored Mar 01, 2018
  d1cf7ff5
- [SCEV] Smart range calculation for SCEVUnknown Phis · f8d2969a
  Max Kazantsev authored Mar 01, 2018
  f8d2969a
- [X86] Stop passing two arguments by reference. NFC · cb7881c6
  Craig Topper authored Mar 01, 2018
  cb7881c6
- [RuntimeDyld][MachO] Fix assertion in encodeAddend, add missing directive to · 811343cf
  Lang Hames authored Mar 01, 2018
  811343cf
- [IPSCCP] do not break musttail invariant (PR36485) · 3762a089
  Reid Kleckner authored Mar 01, 2018
  3762a089
- [GlobalISel][AArch64] Adding -disable-gisel-legality-check CL option · 2b94972e
  Roman Tereshin authored Mar 01, 2018
  2b94972e
- [DWARF] Emit a split line table only if there are split type units. · 1e0116c9
  Paul Robinson authored Mar 01, 2018
  1e0116c9