Commits · cfb3ee21857da7c3d96f89afc3fecb0ec833dde9 · Roger Ferrer / llvm-epi · GitLab

Apr 13, 2022
- [DAG] Add non-uniform vector support to (shl (srl x, c1), c2) -> (and (shift x, c3)) · cfb3ee21
  Simon Pilgrim authored Apr 13, 2022
  cfb3ee21
- [RISCV][NFC] Reorganize check prefixes in some tests to reduce redundant lines · 9d2350fd
  Ping Deng authored Apr 13, 2022
  9d2350fd
- [AArch64] Add missing HasNEON predicate in scalar FABD patterns · ee44896c
  Alex Richardson authored Apr 12, 2022
  ee44896c
- [AArch64] Baseline test for D123491 · 32a353a5
  Alex Richardson authored Apr 11, 2022
  
  32a353a5
- [AutoUpgrade] Don't lose attributes when upgrading mem intrinsics · 9107cd63
  Alex Richardson authored Mar 17, 2022
  9107cd63
- [AArch64][SVE] Fix lowering of "fcmp ueq/one" when using SVE · 44271e7c
  David Sherwood authored Mar 17, 2022
  44271e7c
- [RISCV][NFC] Refactor the type promotion of fsl/fsr/becompress/bdecompress/bfp · 82656790
  Liqin Weng authored Apr 13, 2022
  82656790
- [Test] Add tests showing duplicate PHIs generated by RS4GC (NFC) · 2603dcdd
  Dmitry Makogon authored Apr 13, 2022
  
  2603dcdd
- [LTO] Remove legacy PM support · 0d86fc65
  Nikita Popov authored Apr 13, 2022
  0d86fc65
- Support the min of module flags when linking, use for AArch64 BTI/PAC-RET · b0343a38
  Daniel Kiss authored Apr 13, 2022
  b0343a38
- [gn build] Port e53c461b · 05256c8d
  LLVM GN Syncbot authored Apr 13, 2022
  
  05256c8d
- [X86][test] Add encoding/decoding tests for VEX instruction w/ address-size prefix · fcade8e9
  Shengchen Kan authored Apr 13, 2022
  fcade8e9
- [InstCombine] [NFC] Add a test for fneg.ll · f8a38500
  Chenbing Zheng authored Apr 13, 2022
  
  f8a38500
- [NFC][msan] Switch pointer to a reference · 79fa8be4
  Vitaly Buka authored Apr 12, 2022
  
  79fa8be4
- [SLP]Improve reductions analysis and emission, part 1. · 0e1f4d4d
  Alexey Bataev authored Nov 18, 2021
  0e1f4d4d
- AMDGPU: Update reqd-work-group-size optimization for umin intrinsic · c986d476
  Matt Arsenault authored Apr 07, 2022
  c986d476
- Revert "[AArch64] Set maximum VF with shouldMaximizeVectorBandwidth" · 42ebfa82
  Muhammad Omair Javaid authored Apr 13, 2022
  42ebfa82
- [test][DSE] Precommit test · 32f36331
  Arthur Eubanks authored Apr 12, 2022
  
  32f36331
- RegAllocGreedy: Fix illegal eviction assert for urgent evictions · d4b1be20
  Matt Arsenault authored Mar 29, 2022
  d4b1be20
- [AMDGPU] Split unaligned 4 DWORD DS operations · f6462a26
  Stanislav Mekhanoshin authored Apr 11, 2022
  f6462a26
- [docs][ORC] Fix RST error in dfffb7df . · db8469c4
  Lang Hames authored Apr 12, 2022
  
  db8469c4
- RegAllocGreedy: Roll back successful recolorings on failure · eefed1db
  Matt Arsenault authored Mar 17, 2022
  eefed1db
- [docs] Update OrcV2 doc to include some notes on code removal. · dfffb7df
  Lang Hames authored Apr 12, 2022
  
  dfffb7df
- [ArgPromo][OpaquePointer] Don't promote mismatched function types · 51561b5e
  Arthur Eubanks authored Apr 12, 2022
  51561b5e
- [examples][ORC] Add a new example showing the ORCv2 removable code APIs. · ebdc60a2
  Lang Hames authored Apr 12, 2022
  
  ebdc60a2
Apr 12, 2022
- [MSan] Ensure argument shadow initialized on memcpy · 0adadfa6
  Nikita Popov authored Apr 12, 2022
  0adadfa6
- Revert "[MSan] Ensure argument shadow initialized on memcpy" · efdc90ba
  Vitaly Buka authored Apr 12, 2022
  efdc90ba
- [Reland][lit] Use sharding for GoogleTest format · cd0a5889
  Yuanfang Chen authored Apr 12, 2022
  cd0a5889
- [MSan] Ensure argument shadow initialized on memcpy · 163a9f45
  Vitaly Buka authored Apr 12, 2022
  163a9f45
- [GlobalsModRef][FIX] Ensure we honor synchronizing effects of intrinsics · 9dc7da3f
  Johannes Doerfert authored Apr 11, 2022
  9dc7da3f
- [NVPTX][FIX] Allow __nvvm_reflect in the presence of opaque pointers · 0f070bee
  Johannes Doerfert authored Apr 11, 2022
  0f070bee
- AMDGPU: Don't use unreachable on stores to unhandled address space · 788f94f7
  Matt Arsenault authored Feb 21, 2022
  788f94f7
- GlobalISel: Implement MoreElements for select of vector conditions · 3754f601
  Matt Arsenault authored Apr 11, 2022
  
  3754f601
- AArch64/GlobalISel: Remove pointless s1 legalize rules · 60091222
  Matt Arsenault authored Apr 11, 2022
  60091222
- GlobalISel: Fix lowerSelect handling of boolean high bits · 3f2cc7cc
  Matt Arsenault authored Apr 11, 2022
  3f2cc7cc
- GlobalISel: Handle widening addo/subo booleans · 0e489926
  Matt Arsenault authored Apr 12, 2022
  0e489926
- GlobalISel: Handle widening umulo/smulo condition outputs · 95c2bcbf
  Matt Arsenault authored Apr 12, 2022
  
  95c2bcbf
- GlobalISel: Update mutationIsSane assert for scalable vectors · abe171df
  Matt Arsenault authored Apr 12, 2022
  
  abe171df
- Mips/GlobalISel: Add test for atomic load · 120c5115
  Matt Arsenault authored Apr 10, 2022
  
  120c5115
- [RISCV] Add a encodeLMUL function to RISCVVType. NFC · 057c063c
  Craig Topper authored Apr 12, 2022
  057c063c