Commits · d09c5921421c362ecc24c9a804e87c2bc1d48997 · Roger Ferrer / llvm-epi · GitLab

Oct 24, 2020
- [BasicAA] Fix caching in the presence of phi cycles · d09c5921
  Nikita Popov authored Oct 23, 2020
  d09c5921
- [SystemZ] Define MaxInstLength to have the value of 6. · 7c026a83
  Jonas Paulsson authored Oct 23, 2020
  7c026a83
- [llvm/DebugInfo] Emit DW_OP_implicit_value when tuning for LLDB · 64c4dac6
  Med Ismail Bennani authored Oct 23, 2020
  64c4dac6
- llvm-dwarfdump: Support verbose printing DW_OP_convert to print the CU local... · 0ec5baa1
  David Blaikie authored Oct 23, 2020
  0ec5baa1
- [AutoFDO] Remove a broken assert in merging inlinee samples · a16cbdd6
  Hongtao Yu authored Oct 22, 2020
  a16cbdd6
- Remove unused verifyRegStateMapping() function in RegAllocFast (NFC) · 8f492f64
  Mehdi Amini authored Oct 24, 2020
  8f492f64
- [Hexagon] Handle selection between HVX vector predicates · 1b5baa42
  Krzysztof Parzyszek authored Oct 23, 2020
  1b5baa42
- [StructurizeCFG][NewPM] Port -structurizecfg to NPM · baffd052
  Arthur Eubanks authored Oct 07, 2020
  baffd052
- [Inliner][NPM] Properly pass callee AAResults · ba22c403
  Arthur Eubanks authored Oct 16, 2020
  ba22c403
Oct 23, 2020
- [RISCV] Use the commercial name for scheduling model (NFC) · fe9a7d96
  Evandro Menezes authored Oct 08, 2020
  fe9a7d96
- [SVE] Lower fixed length VECREDUCE_SEQ_FADD operation · a1cc274c
  Cameron McInally authored Oct 23, 2020
  a1cc274c
- GC-parseable element atomic memcpy/memmove · 6ec2c5e4
  Artur Pilipenko authored Oct 01, 2020
  6ec2c5e4
- Unconditionally #include <future> · bfb04aeb
  Geoffrey Martin-Noble authored Oct 23, 2020
  bfb04aeb
- [IR] add fn attr for no_stack_protector; prevent inlining on mismatch · b7926ce6
  Nick Desaulniers authored Oct 23, 2020
  b7926ce6
- [AMDGPU] Fixed isLegalRegOperand() with physregs · 2e64ad94
  Stanislav Mekhanoshin authored Oct 23, 2020
  2e64ad94
- [NFC] Use [MC]Register in RegAllocGreedy · 819044ad
  Mircea Trofin authored Oct 22, 2020
  819044ad
- [PowerPC] Add intrinsics for MMA · edb27912
  Baptiste Saleil authored Oct 13, 2020
  edb27912
- [PhiValues] Use SetVector to avoid non-determinism · dd887d97
  Nikita Popov authored Oct 22, 2020
  dd887d97
- [AArch64][GlobalISel] Introduce a new post-isel optimization pass. · 0f0fd383
  Amara Emerson authored Oct 13, 2020
  0f0fd383
- Revert "[CGSCC] Detect devirtualization in more cases" · 5668eda8
  Arthur Eubanks authored Oct 23, 2020
  5668eda8
- Re-apply "[JITLink][ELF] Add support for ELF::R_X86_64_REX_GOTPCRELX relocation" · 996a8b42
  Lang Hames authored Oct 22, 2020
  996a8b42
- [AArch64][SVE] Fix umin/umax lowering to handle out of range imm. · 1e113c07
  Huihui Zhang authored Oct 23, 2020
  1e113c07
- [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions · 7a74bb89
  Victor Huang authored Oct 23, 2020
  7a74bb89
- [AMDGPU] Fix access beyond the end of the basic block in execMayBeModifiedBeforeAnyUse. · 00255f41
  vpykhtin authored Oct 14, 2020
  00255f41
- [WebAssembly] Implementation of (most) table instructions · 69e2797e
  Paulo Matos authored Oct 23, 2020
  69e2797e
- [DebugInstrRef] Handle DBG_INSTR_REFs use-before-defs in LiveDebugValues · b1b2c6ab
  Jeremy Morse authored Oct 23, 2020
  b1b2c6ab
- [AMDGPU] Add simplification/combines for llvm.amdgcn.fma.legacy · 958130df
  Jay Foad authored Oct 23, 2020
  958130df
- Revert "[Statepoints] Allow deopt GC pointer on VReg if gc-live bundle is empty." · 4f7ee559
  Denis Antrushin authored Oct 23, 2020
  4f7ee559
- [TableGen] Change !getop and !setop to !getdagop and !setdagop. · 876af264
  Paul C. Anagnostopoulos authored Oct 20, 2020
  876af264
- AMDGPU: Don't query for TII in TII · 8a59d4b6
  Matt Arsenault authored Oct 22, 2020
  
  8a59d4b6
- AMDGPU: Increase branch size estimate with offset bug · d6199647
  Matt Arsenault authored Oct 22, 2020
  d6199647
- [DebugInstrRef] Convert DBG_INSTR_REFs into variable locations · 68f47157
  Jeremy Morse authored Oct 23, 2020
  68f47157
- [LSR] ignore profitable chain when reg num is not major cost. · 1e0b6c1d
  Chen Zheng authored Oct 20, 2020
  1e0b6c1d
- [ValueTracking] add range limits for cttz · c7219807
  Sanjay Patel authored Oct 23, 2020
  c7219807
- [ValueTracking] add range limits for ctlz · 3fb0d6b0
  Sanjay Patel authored Oct 23, 2020
  3fb0d6b0
- [ValueTracking] add range limits for ctpop · 748ecc6b
  Sanjay Patel authored Oct 23, 2020
  748ecc6b
- [InstCombine] matchBSwapOrBitReverse - expose bswap/bitreverse matching flags. · 1cab3bf0
  Simon Pilgrim authored Oct 23, 2020
  1cab3bf0
- [InstCombine] Rename InstCombinerImpl::matchBSwap to matchBSwapOrBitReverse. NFCI. · 19a13bf5
  Simon Pilgrim authored Oct 23, 2020
  19a13bf5
- [X86] lowerShuffleWithPERMV - use MVT::changeTypeToInteger helper. NFCI. · 936ef89e
  Simon Pilgrim authored Oct 23, 2020
  
  936ef89e
- [ARM][SchedModels] Convert IsR1P0AndLaterPred to MCSchedPredicate. NFC · cb86522c
  Evgeny Leviant authored Oct 23, 2020
  cb86522c