Commits · d29fc6e7d24f9bf67512180c0be3f08526049a27 · Roger Ferrer / llvm-epi · GitLab

May 12, 2022
- [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. · d29fc6e7
  Karl Meakin authored May 12, 2022
  d29fc6e7
- [yaml2obj][COFF] Add missing RISCV constants · c5f8b98e
  Eli Friedman authored May 12, 2022
  
  c5f8b98e
- [RISCV] Add extra space into error message about unsupported extension version. · 232c00ba
  Craig Topper authored May 12, 2022
  232c00ba
- [llvm-readobj] [COFF] Fix the printout for ARM64 packed homed parameters · 0187bb28
  Martin Storsjö authored May 12, 2022
  0187bb28
- [LAA] Initial support for runtime checks with pointer selects. · 5890b301
  Florian Hahn authored May 12, 2022
  5890b301
- [SLP][NFC] Added test to exercise the cause of a crash caused by reordering. · 76775bde
  Vasileios Porpodas authored May 11, 2022
  76775bde
- [llvm-profgen] Filter out oversized LBR ranges. · 9f732af5
  Hongtao Yu authored May 11, 2022
  9f732af5
- [InstCombine] freeze operand in div+mul fold · 2fa8fc3d
  Sanjay Patel authored May 12, 2022
  2fa8fc3d
- [RISCV] Extend dataflow workaround from D119518 to fallthrough blocks · 52b5f1f7
  Philip Reames authored May 12, 2022
  52b5f1f7
- [CostModel][X86] Auto generate partial interleaved load LV costs using UTC_ARGS --filter control · 47be0707
  Simon Pilgrim authored May 12, 2022
  
  47be0707
- [CostModel][X86] Auto generate masked load/store LV costs using UTC_ARGS --filter control · 14e83ada
  Simon Pilgrim authored May 12, 2022
  14e83ada
- [CostModel][X86] Auto generate gather/scatter LV costs using UTC_ARGS --filter control · a5c45c4d
  Simon Pilgrim authored May 12, 2022
  a5c45c4d
- [CSSPGO][llvm-profgen] Do not duplicate context profiles into base profile... · 23191a4f
  Hongtao Yu authored May 12, 2022
  23191a4f
- [TypePromotion] Promote undef by converting to 0. · cec249c6
  Craig Topper authored May 12, 2022
  cec249c6
- [RISCV] Use tail agnostic policy when selecting riscv_fma_vl to instructions · 40e96545
  Craig Topper authored May 11, 2022
  40e96545
- [DeadArgElim] Re-apply: Set unused arguments for internal functions · 9766fed9
  Quentin Colombet authored May 02, 2022
  9766fed9
- [CodeGen][NFC] Move some comments from the end of lines to above them · 1106bc20
  Fraser Cormack authored May 12, 2022
  1106bc20
- [DebugInfo][InstrRef] Describe value sizes when spilt to stack · a975472f
  Jeremy Morse authored May 12, 2022
  a975472f
- [ArgPromotion] Make a non-byval promotion attempt first · 098afdb0
  Pavel Samolysov authored May 12, 2022
  098afdb0
- [AArch64] Preserve chain when lowering fixed length load to SVE (PR55281) · 44d85259
  Nikita Popov authored May 12, 2022
  44d85259
- Rename and fix ValueMap::resize to reserve · 28a0b94d
  Pedro Olsen Ferreira authored May 12, 2022
  28a0b94d
- [AArch64] Stop creating unnecessary label MCSymbols for each Windows unwind opcode. NFC. · 2d8ce08b
  Martin Storsjö authored Nov 11, 2021
  2d8ce08b
- [MC] [Win64EH] Simplify code using WinEH::Instruction::operator!=. NFC. · 490cd14f
  Martin Storsjö authored Nov 24, 2021
  490cd14f
- [FastISel] Add some debug output (NFC) · 50f846d6
  Nikita Popov authored May 12, 2022
  50f846d6
- [Test] Regenerate checks using auto-update (work around PR55365) · 2a40cc53
  Max Kazantsev authored May 12, 2022
  
  2a40cc53
- [Intrinsics] Fix `nvvm_prmt` intrinsic attributes · 7b22cf12
  Dmitry Vassiliev authored May 12, 2022
  7b22cf12
- [AMDGPU][NFC] Remove unused function. · bf5fc0d6
  Ivan Kosarev authored May 12, 2022
  bf5fc0d6
- [AMDGPU][GFX10] Support base+soffset+offset SMEM stores. · cb67b2cc
  Ivan Kosarev authored May 12, 2022
  cb67b2cc
- Revert "Add an error message to the default SIGPIPE handler" · 7b53a45e
  Tim Northover authored May 12, 2022
  7b53a45e
- [AMDGPU] Remove pre-committed test for D124981. NFC. · 698fda0e
  Carl Ritson authored May 11, 2022
  
  698fda0e
- Add an error message to the default SIGPIPE handler · e845f899
  Tim Northover authored May 11, 2022
  e845f899
- silence new -Wunused-result warnings in test · 52328daf
  Krasimir Georgiev authored May 12, 2022
  52328daf
- [LLVM][Casting.h] Update dyn_cast machinery to provide more control over how... · f156b51a
  bzcheeseman authored Apr 16, 2022
  f156b51a
- [Bitcode] Simplify code after FUNC_CODE_BLOCKADDR_USERS changes (D124878) · bb353df5
  Fangrui Song authored May 11, 2022
  bb353df5
- [BPF] Implement mod operation · 50f5cef3
  Jim Lin authored May 11, 2022
  50f5cef3
- [LegalizeVectorTypes] Enable WidenVecRes_SETCC work for scalable vector. · 9176096c
  Lian Wang authored May 12, 2022
  9176096c
- [RISCV][NFC] Simplify tests by reorganizing check prefixes · 995d3892
  Ping Deng authored May 12, 2022
  995d3892
- [LoongArch] Check msb is not less than lsb for the bstr{ins/pick}.{w/d} instructions · 24532d05
  Weining Lu authored May 03, 2022
  24532d05
- Recommit "[SLP] Make reordering aware of external vectorizable scalar stores." · 0950d406
  Vasileios Porpodas authored May 11, 2022
  0950d406
- [MIPS] Remove an incorrect microMIPS instruction alias · ba1c70c6
  Simon Dardis authored May 08, 2022
  ba1c70c6