Commits · d2b6ac6ccda5ad8e38eee38e7ee46acad03540be · Roger Ferrer / llvm-epi · GitLab

Feb 04, 2020
- Revert "[X86] Use X86ISD::SUB instead of X86ISD::CMP in some places." · d2b6ac6c
  Kadir Cetinkaya authored Feb 04, 2020
  d2b6ac6c
- [ARM][VecReduce] Force expand vector_reduce_fmin · 362d00e0
  David Green authored Feb 04, 2020
  362d00e0
- [NFC] Encapsulate MemOp logic · b8144c05
  Guillaume Chatelet authored Feb 04, 2020
  b8144c05
- [ValueTracking] Let isGuaranteedToBeUndefOrPoison look into operands of icmp · dd7d6102
  Juneyoung Lee authored Feb 04, 2020
  
  dd7d6102
- Let isGuaranteedNotToBeUndefOrPoison consider PHINode with constant values · 36272d5f
  Juneyoung Lee authored Feb 04, 2020
  
  36272d5f
- [X86] Remove unneeded code that looks for (and (i8 (X86setcc_c)) · cd14b4a6
  Craig Topper authored Feb 03, 2020
  cd14b4a6
- [GVN] Add GVNOption to control load-pre more fine-grained. · e53bbf12
  Thomas Raoux authored Feb 03, 2020
  e53bbf12
- [X86] Remove some uncovered and possibly broken code from combineZext. · 4581d974
  Craig Topper authored Feb 03, 2020
  4581d974
- [X86] Use X86ISD::SUB instead of X86ISD::CMP in some places. · 8413116b
  Craig Topper authored Feb 03, 2020
  8413116b
- [X86] Don't emit two X86ISD::COMI/UCOMI nodes when handling comi/ucomi intrinsics. · c3a47221
  Craig Topper authored Feb 03, 2020
  c3a47221
- DebugInfo: Hash DW_OP_convert in loclists when using Split DWARF · 1ced28cb
  David Blaikie authored Feb 03, 2020
  1ced28cb
- DebugInfo: Simplify emitDebugLocEntry by never passing a null CU · 031f83fb
  David Blaikie authored Feb 03, 2020
  
  031f83fb
- [X86] Update the haswell and broadwell scheduler information for gather instructions · c7768ce5
  Craig Topper authored Feb 03, 2020
  c7768ce5
- Revert "Reland "[AArch64] Fix data race on RegisterBank initialization."" · 9a40670a
  Huihui Zhang authored Feb 03, 2020
  9a40670a
- Reland "[AArch64] Fix data race on RegisterBank initialization." · 9c726e9d
  Huihui Zhang authored Feb 03, 2020
  9c726e9d
- [AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation · 9effe38b
  Jessica Paquette authored Feb 03, 2020
  9effe38b
Feb 03, 2020
- [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions... · 2252cac6
  Jay Foad authored Dec 20, 2019
  2252cac6
- [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation · 37910fd0
  Jessica Paquette authored Feb 03, 2020
  37910fd0
- AMDGPU: Add flag to control mem intrinsic expansion · 7d3aace3
  Matt Arsenault authored Jan 31, 2020
  7d3aace3
- [NFC] Factor out function to detect if an attribute has an argument. · 15f54d34
  Tyker authored Feb 02, 2020
  
  15f54d34
- AMDGPU: Analyze divergence of inline asm · cb7b661d
  Matt Arsenault authored Feb 03, 2020
  
  cb7b661d
- AMDGPU/GlobalISel: Allow selecting s128 load/stores · 2758ae41
  Matt Arsenault authored Feb 01, 2020
  
  2758ae41
- AMDGPU: Fix splitting wide f32 s.buffer.load intrinsics · 726446a0
  Matt Arsenault authored Feb 01, 2020
  726446a0
- [AIX] Don't use a zero fill with a second parameter · 77e71c52
  David Tenty authored Feb 03, 2020
  77e71c52
- [AArch64][GlobalISel] Walk through G_AND in TB(N)Z bit calculation · 2bd46444
  Jessica Paquette authored Jan 30, 2020
  2bd46444
- [AArch64][GlobalISel] Don't reconvert to p0 in convertPtrAddToAdd(). · b911b990
  Amara Emerson authored Feb 03, 2020
  b911b990
- GlobalISel: Implement fewerElementsVector for G_SEXT_INREG · cd7650c1
  Matt Arsenault authored Jan 11, 2020
  cd7650c1
- [TargetRegisterInfo] Make the heuristic to skip region split overridable by the target · f26ff8c9
  Quentin Colombet authored Feb 03, 2020
  f26ff8c9
- Add PassManagerImpl.h to hide implementation details · 105642af
  Reid Kleckner authored Jan 31, 2020
  105642af
- Revert "[SVE] Fix bug in simplification of scalable vector instructions" · a0544103
  Reid Kleckner authored Feb 03, 2020
  a0544103
- [LoopUtils] Make duplicate method a utility. [NFCI] · 388de9df
  Alina Sbirlea authored Jan 27, 2020
  388de9df
- [SVE] Fix bug in simplification of scalable vector instructions · 31574d38
  Christopher Tetreault authored Feb 03, 2020
  31574d38
- [SimplifyLibCalls] Remove unused IRBuilder argument; NFC · 575a975a
  Nikita Popov authored Feb 03, 2020
  575a975a
- [X86] getTargetShuffleMask - use getConstantOperandVal helper. NFCI. · 3ece5a23
  Simon Pilgrim authored Feb 03, 2020
  
  3ece5a23
- [InstCombine] Add replaceOperand() helper · 878cb38a
  Nikita Popov authored Jan 31, 2020
  878cb38a
- [InstCombine] Rename worklist methods; NFC · e6c9ab4f
  Nikita Popov authored Jan 30, 2020
  e6c9ab4f
- [ARM] Expand vector reduction intrinsics on soft float · 1cc4f8d1
  Nikita Popov authored Feb 02, 2020
  1cc4f8d1
- [InstCombine] Fix unused variable warning; NFC · a5995405
  Nikita Popov authored Feb 03, 2020
  
  a5995405
- [ThinLTO] More efficient export computation (NFC) · bed4d9c8
  Teresa Johnson authored Feb 02, 2020
  bed4d9c8
- [AMDGPU] getMemOperandsWithOffset: add resource operand for BUF instructions · 05297b7c
  Jay Foad authored Jan 06, 2020
  05297b7c