Commits · d4cb39287c50234e15d11e1b5bc90e9c7ebf08b7 · Roger Ferrer / llvm-epi · GitLab

Nov 29, 2022
- [PowerPC] Fix vperm codegen · 7614ba0a
  Maryam Moghadas authored Nov 25, 2022
  7614ba0a
- Revert "enable code-object-version=5" · ca856fff
  Ron Lieberman authored Nov 29, 2022
  ca856fff
- AMDGPU: Remove BufferPseudoSourceValue · 43b86bf9
  Nicolai Hähnle authored Nov 25, 2022
  43b86bf9
- enable code-object-version=5 · d882ba7a
  Ron Lieberman authored Nov 29, 2022
  
  d882ba7a
- Revert "[SystemZ] change test to mir to better isolate miscompile; NFC" · 1f925d70
  Sanjay Patel authored Nov 29, 2022
  1f925d70
- [AMDGPU] Unify uniform return and divergent unreachable blocks · b32a5666
  Brendon Cahoon authored Oct 27, 2022
  b32a5666
- [WebAssembly] Move debug tests into DebugInfo · 341d4cde
  Heejin Ahn authored Nov 28, 2022
  341d4cde
- AMDGPU: Fix broken test · 600e9d33
  Matt Arsenault authored Nov 29, 2022
  600e9d33
- DAG: Fix assert when alloca has inconsistent pointer size · ee29a846
  Matt Arsenault authored Nov 28, 2022
  ee29a846
- [SDAG] Allow scalable vectors in ComputeNumSignBits (try 2) · fc0efb7e
  Philip Reames authored Nov 29, 2022
  fc0efb7e
- AMDGPU: Remove unnecessary metadata from test · a74ea40c
  Matt Arsenault authored Nov 29, 2022
  a74ea40c
- [AMDGPU] Add support for new LLVM vector types · 595a0884
  Mateja Marjanovic authored Nov 17, 2022
  595a0884
- [DAG] Attempt to replace a mul node with an existing umul_lohi/smul_lohi node (PR59217) · 30eff7f2
  Simon Pilgrim authored Nov 29, 2022
  30eff7f2
- [AArch64][SME]: Generate streaming-compatible code for fp-extend-trunc · 02db5603
  Hassnaa Hamdi authored Nov 29, 2022
  02db5603
- [AArch64][SME]: Generate streaming-compatible code for bit counting/select · 9c7286f9
  Hassnaa Hamdi authored Nov 29, 2022
  9c7286f9
- [AArch64][SME]: Add precursory tests for D138682 · 17e51cd4
  Hassnaa Hamdi authored Nov 24, 2022
  17e51cd4
- [NFC][AMDGPU] Pre-commit tests for d1364320 · 5f77ee40
  Thomas Symalla authored Nov 29, 2022
  
  5f77ee40
- [ARM,MVE] Update MVE_VMLA_qr for architecture change. · e45cbf99
  Simon Tatham authored Nov 29, 2022
  e45cbf99
- [AMDGPU] Fine tune LDS misaligned access speed · 28eb9ed3
  Stanislav Mekhanoshin authored Apr 21, 2022
  28eb9ed3
Nov 28, 2022
- [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp · 322966f8
  Janek van Oirschot authored Nov 28, 2022
  322966f8
- AMDGPU: Bulk update some intrinsic tests to opaque pointers · ad386a88
  Matt Arsenault authored Nov 28, 2022
  ad386a88
- AMDGPU: Convert some memcpy test to opaque pointers · 7a3fb6a6
  Matt Arsenault authored Nov 28, 2022
  7a3fb6a6
- [RISCV] Simplify eliminateFrameIndex in advance of reuse [nfc-ish] · 5583972f
  Philip Reames authored Nov 28, 2022
  5583972f
- [AVR] Do not use R0/R1 on avrtiny · 5527b215
  Ayke van Laethem authored Nov 23, 2022
  5527b215
- AMDGPU: Bulk update all GlobalISel tests to use opaque pointers · 8e0fadda
  Matt Arsenault authored Nov 28, 2022
  
  8e0fadda
- [AArch64] Add patterns for SVE predicated add/sub and mov combine · 7bbfc6cd
  Nicola Lancellotti authored Nov 22, 2022
  7bbfc6cd
- [AArch64] Pre-commit test for "Add patterns for SVE predicated add/sub and mov combine" · 1884ada7
  Nicola Lancellotti authored Nov 22, 2022
  
  1884ada7
- Revert "[AArch64] Canonicalize ZERO_EXTEND to VSELECT" · 49cd18c5
  Nicola Lancellotti authored Nov 22, 2022
  49cd18c5
- AMDGPU: Bulk update some r600 tests to opaque pointers · da0293e3
  Matt Arsenault authored Nov 28, 2022
  da0293e3
- AMDGPU: Convert promote alloca tests to opaque pointers · 50caf693
  Matt Arsenault authored Nov 28, 2022
  
  50caf693
- AMDGPU: Convert test to generated checks · b3df889b
  Matt Arsenault authored Nov 28, 2022
  b3df889b
- AMDGPU: Use named values in a test · 8f071fec
  Matt Arsenault authored Nov 28, 2022
  8f071fec
- AMDGPU: Use modern address spaces in some tests · c1710e77
  Matt Arsenault authored Nov 28, 2022
  c1710e77
- AMDGPU/GlobalISel: Fix hardcoded virtual register numbers in test · 1ab9fa6f
  Matt Arsenault authored Nov 28, 2022
  
  1ab9fa6f
- [LoongArch] Add atomic ordering information for binary atomic operations · a2d10bda
  gonglingqin authored Nov 28, 2022
  a2d10bda
- [AMDGPU] Intrinsic to expose s_wait_event for export ready · 7940888c
  David Stuttard authored Nov 17, 2022
  7940888c
- [AArch64][SME]: Generate streaming-compatible code for fp-compares. · 60ab791a
  Hassnaa Hamdi authored Nov 24, 2022
  60ab791a
Nov 27, 2022
- [X86] Add test coverage for Issue #59217 · 23b26137
  Simon Pilgrim authored Nov 27, 2022
  
  23b26137
- [AVR] Remove unused register scavenger · 91ae1afd
  Ayke van Laethem authored Nov 23, 2022
  91ae1afd
- [AArch64] Add GPR rr instructions to isAssociativeAndCommutative · 6a353c77
  David Green authored Nov 27, 2022
  6a353c77