Commits · d55594bb5ea3ae625e2ec298e4475bca28e05a71 · Roger Ferrer / llvm-epi · GitLab

Nov 14, 2022
- [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores. · d55594bb
  Ivan Kosarev authored Nov 14, 2022
  d55594bb
- [AMDGPU] More use of DivergentBinFrag and friends. NFC. · f6670a3f
  Jay Foad authored Nov 14, 2022
  
  f6670a3f
- [AA] Move MayBeCrossIteration into AAQI (NFC) · b71bf080
  Nikita Popov authored Oct 18, 2022
  b71bf080
- [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores. · 1b560e6a
  Ivan Kosarev authored Nov 14, 2022
  1b560e6a
- [AMDGPU] Define and use UniformTernaryFrag. NFC. · ae4718a2
  Jay Foad authored Nov 14, 2022
  
  ae4718a2
- [X86] Remove unnecessary overrides for CBW/CWDE/CDQE/CMC instructions · 814267e3
  Simon Pilgrim authored Nov 14, 2022
  814267e3
- [AArch64] Add all SME2.1 instructions Assembly/Disassembly · 3eacda45
  Caroline Concatto authored Nov 03, 2022
  3eacda45
- [AST] Remove legacy AliasSetPrinter pass · 458ae539
  Nikita Popov authored Nov 14, 2022
  458ae539
- [AArch64] Add match patterns for the reassociated forms of FNMUL · cc5f93bb
  Sjoerd Meijer authored Nov 11, 2022
  cc5f93bb
- [LoopVersioningLICM] Clarify scope of AST (NFC) · 6d98f3a6
  Nikita Popov authored Nov 14, 2022
  6d98f3a6
- [LoopVersioningLICM] Remove unnecessary reset code (NFC) · 47eddbbf
  Nikita Popov authored Nov 14, 2022
  47eddbbf
- [ARM][CodeGen] Add support for complex deinterleaving · d52e2839
  Nicholas Guy authored Nov 14, 2022
  d52e2839
- [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax · ef6f3c76
  Dmitry Preobrazhensky authored Nov 14, 2022
  ef6f3c76
- [ThinLTO] a ThinLTO warning is added if cache_size_bytes or cache_size_files... · ca875cb4
  Ying Yi authored Oct 10, 2022
  ca875cb4
- [AMDGPU] Simplify SelectPat and remove comment obsoleted by D133593 · eb05da5e
  Jay Foad authored Nov 14, 2022
  
  eb05da5e
- [reg2mem] Skip non-sized Instructions (PR58890) · 200f3410
  HanSheng Zhang authored Nov 14, 2022
  200f3410
- Do not write a comma when varargs is the only argument · 8ad88f12
  Joshua Cao authored Nov 13, 2022
  8ad88f12
- [ConstraintElimination] Use SmallVectorImpl (NFC) · 42d92614
  Nikita Popov authored Nov 14, 2022
  42d92614
- [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI) · feda983f
  Nikita Popov authored Nov 08, 2022
  feda983f
- [Coroutines] Do not add allocas for retcon coroutines · ce879a03
  Sebastian Neubauer authored Nov 14, 2022
  ce879a03
- [ConstraintElimination] Add Decomposition struct (NFCI) · e82b5b5b
  Nikita Popov authored Nov 11, 2022
  e82b5b5b
- [ConstraintElimination] Make decompose() infallible · 30982a59
  Nikita Popov authored Nov 11, 2022
  30982a59
- [IRCE] Bail out if AddRec in icmp is for another loop (PR58912) · 10ab29ec
  Dmitry Makogon authored Nov 11, 2022
  10ab29ec
- [RISCV] Add PACKH/PACKW/PACK to hasAllNBitUsers. · 3b759798
  Craig Topper authored Nov 13, 2022
  
  3b759798
- [RISCV] Add another PACKH pattern. · 3ac93d1f
  Craig Topper authored Nov 13, 2022
  3ac93d1f
- [RISCV] Improve PACKH instruction selection · 40ae4b89
  Craig Topper authored Nov 13, 2022
  40ae4b89
- [RISCV] Don't use zero-stride vector load if there's no optimized u-arch · c66b6977
  Pengcheng Wang authored Nov 14, 2022
  c66b6977
- [RISCV] Add PACKW and PACKH to isSignExtendingOpW in RISCVSExtWRemoval. · 1f258887
  Craig Topper authored Nov 13, 2022
  1f258887
- [RISCV] Improve selection of PACKW. · 1a8ba9e1
  Craig Topper authored Nov 13, 2022
  1a8ba9e1
- [LoopFlatten] Forget all block and loop dispositions after flatten · 98eb9179
  luxufan authored Nov 11, 2022
  98eb9179
- [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg · 19ae5391
  gonglingqin authored Nov 14, 2022
  19ae5391
- [RISCV][NFC] Remove dead code. · 0c0681b7
  Yeting Kuo authored Nov 13, 2022
  0c0681b7
- [RISCV] Fix incorrect early out from isSignExtendedW in RISCVSExtWRemoval. · 03f9009c
  Craig Topper authored Nov 13, 2022
  03f9009c
- [PowerPC] Use ArrayRef (NFC) · 16d969ca
  Kazu Hirata authored Nov 13, 2022
  16d969ca
- [RISCV] Improve selection of PACK/PACKW for AssertZExt input. · 95388f73
  Craig Topper authored Nov 13, 2022
  
  95388f73
Nov 13, 2022
- [IR] Use llvm::any_of (NFC) · 378778a0
  Kazu Hirata authored Nov 13, 2022
  
  378778a0
- [Hexagon] Use `Register` instead of `unsigned`, NFC · c0abd057
  Krzysztof Parzyszek authored Nov 13, 2022
  c0abd057
- [VectorUtils] Skip interleave members with diff type and alloca sizes. · 758699c3
  Florian Hahn authored Nov 13, 2022
  758699c3
- [Hexagon] Pass Hexagon::PC to InitializeHexagonMCRegisterInfo · 1a6d7704
  Krzysztof Parzyszek authored Nov 13, 2022
  1a6d7704
- [Hexagon] Remove unneeded HexagonRegisterInfo::getRARegister · 110825b6
  Krzysztof Parzyszek authored Nov 13, 2022
  110825b6