Commits · d873a14e934635c208d8bd8b74ef57492bfc7404 · Roger Ferrer / llvm-epi · GitLab

Jul 21, 2023
- ValueTracking: Implement computeKnownFPClass for frexp · d873a14e
  Matt Arsenault authored May 03, 2023
  d873a14e
- ValueTracking: Add baseline tests for frexp handling in computeKnownFPClass · 35f9fdb5
  Matt Arsenault authored May 03, 2023
  
  35f9fdb5
- AMDGPU: Add baseline test for fdiv combine · 37512d76
  Matt Arsenault authored Jul 01, 2023
  
  37512d76
- [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits · 413c119c
  Noah Goldstein authored Jul 21, 2023
  413c119c
- [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC · 5ca14d43
  Noah Goldstein authored Jun 11, 2023
  5ca14d43
- [InstCombine] Canonicalize `(X^(X-1)) u{ge,lt} X` as pow2 test · 142f7448
  Noah Goldstein authored Jun 11, 2023
  142f7448
- [InstCombine] Add tests for canonicalizing `(X^(X-1)) u{ge,lt} X` as pow2 test; NFC · f21a042a
  Noah Goldstein authored Jun 11, 2023
  f21a042a
- [llvm-objdump] Use BBEntry::BBID to represent basic block numbers. · bf98aaae
  Rahman Lavaee authored Jul 17, 2023
  bf98aaae
- [X86] combineBitcastvxi1 - don't prematurely create PACKSS nodes. · 65c9153c
  Simon Pilgrim authored Jul 21, 2023
  65c9153c
- [X86] truncateVectorWithPACK - avoid... · c6c5aad6
  Simon Pilgrim authored Jul 21, 2023
  c6c5aad6
- [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC. · 237784dd
  Stanislav Mekhanoshin authored Jul 20, 2023
  237784dd
- [X86] Add isUpperSubvectorUndef helper to simplify recognition of vectors... · b95435a6
  Simon Pilgrim authored Jul 21, 2023
  b95435a6
- [RISCV][NFC] Add RISCVSubtarget field to RISCVExpandPseudo and RISCVPreRAExpandPseudo · b81b4cfc
  Alex Bradbury authored Jul 21, 2023
  b81b4cfc
- [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap · 9996e71f
  Fangrui Song authored Jul 21, 2023
  9996e71f
- [RISCV] Allow delayed decision for ADD/SUB relocations · ffa829c4
  Fangrui Song authored Jul 21, 2023
  ffa829c4
- Revert "[X86][BF16] Do not scalarize masked load for BF16 when we have BWI" · fbae3d1d
  Phoebe Wang authored Jul 21, 2023
  fbae3d1d
- [X86][BF16] Do not scalarize masked load for BF16 when we have BWI · ca1c0520
  Phoebe Wang authored Jul 21, 2023
  ca1c0520
- [ARM] Extend regression test for D154281 · 6c8f4472
  Jay Foad authored Jul 21, 2023
  6c8f4472
- [FunctionAttrs] Add tests for PR63936 (NFC) · 4bb2234a
  Nikita Popov authored Jul 21, 2023
  
  4bb2234a
- Add missing SLEEF mappings to scalable vector functions for log2 and log2f · 38cdb007
  Maciej Gabka authored Jul 20, 2023
  38cdb007
- [ValueTracking] Check non-zero operator before dominating condition (NFC) · 4f7e0346
  Nikita Popov authored Jul 21, 2023
  4f7e0346
- [DAG] SimplifyDemandedBits - call ComputeKnownBits for constant non-uniform ISD::SRL shift amounts · ae60706d
  Simon Pilgrim authored Jul 21, 2023
  ae60706d
- [ValueTracking] Extract isKnownNonZeroFromOperator() (NFC) · 98b10727
  Nikita Popov authored Jul 21, 2023
  98b10727
- Revert "[TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f" · b172fbff
  Maciej Gabka authored Jul 21, 2023
  b172fbff
- [TLI][AArch64] Add missing SLEEF mappings to scalable vector functions for log2 and log2f · 791c8960
  Maciej Gabka authored Jul 20, 2023
  791c8960
- [llvm][SLP] Exit early if inputs to comparator are equal · 8fa02db8
  David Berard authored Jul 21, 2023
  8fa02db8
- [X86] matchBinaryShuffle - match PACKUS for v2i64 -> v4i32 shuffle truncation patterns. · be62041e
  Simon Pilgrim authored Jul 21, 2023
  be62041e
- [X86] Add packus.ll test coverage · c0a1f462
  Simon Pilgrim authored Jul 21, 2023
  c0a1f462
- [X86] packss.ll - add SSE4.2 test coverage · 7196eb25
  Simon Pilgrim authored Jul 20, 2023
  
  7196eb25
- Revert "[LIT] Added an option to llvm-lit to emit the necessary test coverage... · db04f018
  Shivam Gupta authored Jul 21, 2023
  db04f018
- [AMDGPU] [NFC] Fixed a typo in SIShrinkInstructions.cpp · c41a62e9
  Pranav Taneja authored Jul 21, 2023
  c41a62e9
- [AMDGPU][RFC] Update isLegalAddressingMode for GFX9 SMEM signed offsets · e45a0c29
  Jay Foad authored Jul 18, 2023
  e45a0c29
- [AMDGPU] Add tests for SMEM addressing modes in CodeGenPrepare · 787bef0b
  Jay Foad authored Jul 20, 2023
  787bef0b
- [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case · d8e26bcc
  Shivam Gupta authored Jul 21, 2023
  d8e26bcc
- [RISCV] Add SDNode patterns for vrol.[vv,vx] and vror.[vv,vx,vi] · 33a83c54
  Luke Lau authored Jul 17, 2023
  33a83c54
- [RISCV] Remove VPatBinaryExtVL_WV_WX multiclass. NFC · f6bdfb0b
  Luke Lau authored Jul 20, 2023
  f6bdfb0b
- [RISCV] Add patterns for vnsr[a,l].wx where shift amount has different type than vector element · 24628a14
  Luke Lau authored Jul 19, 2023
  24628a14
- [RISCV] Add tests for vnsr[l,a].wx patterns that could be matched · 418e678b
  Luke Lau authored Jul 19, 2023
  418e678b
- [SystemZ] Allow symbols in immediate asm operands · a0eee6c9
  Ilya Leoshkevich authored Jul 20, 2023
  a0eee6c9
- [X86] Expand constant expressions in test (NFC) · f060f095
  Nikita Popov authored Jul 21, 2023
  
  f060f095