Commits · dcda3e67e729ab8f2566563bd26f6ec018ce21d7 · Roger Ferrer / llvm-epi · GitLab

Jun 09, 2023
- [RISCV] Cleanup vmv.v.x isel patterns to look more like other patterns. NFC · dcda3e67
  Craig Topper authored Jun 09, 2023
  dcda3e67
- [WebAssembly] Re-land 8392bf60 · 18077e9f
  Caleb Zulawski authored Jun 09, 2023
  18077e9f
- [RDF] Allow RegisterRef to contain register unit · 859b05b0
  Krzysztof Parzyszek authored Jun 01, 2023
  
  859b05b0
- [GlobalIsel][X86] Update legalization of G_PTR_ADD · 0662167c
  Simon Pilgrim authored Jun 09, 2023
  0662167c
- Reland [AMDGPU] New PAL metadata updates to ps_extra_lds_size and float_mode · 90431ca2
  David Stuttard authored May 11, 2023
  90431ca2
- [GlobalIsel][X86] Move intrinsics getActionDefinitionsBuilder defs above remaining legacy handling · 024e8adf
  Simon Pilgrim authored Jun 09, 2023
  
  024e8adf
- [LV][AArch64] Allow (limited) interleaving for scalable vectors · 95bfb190
  Graham Hunter authored Mar 21, 2023
  95bfb190
- [GlobalIsel][X86] Update legalization of G_FPEXT/G_FPTRUNC · 86f6e779
  Simon Pilgrim authored Jun 08, 2023
  86f6e779
- [AMDGPU] Port no-hsa-graphic-shaders.ll to code object V4 · ecbd37d5
  pvanhout authored Jun 08, 2023
  ecbd37d5
- [AMDGPU] Iterative scan implementation for atomic optimizer. · f6c8a8e9
  Pravin Jagtap authored Jun 09, 2023
  f6c8a8e9
- [RISCV] Use computeVLMax and getVScale to simplify code. NFC · a90e3509
  Craig Topper authored Jun 08, 2023
  
  a90e3509
- [GlobalISel] Implement some binary reassociations, G_ADD for now · 086601ea
  Amara Emerson authored Jun 03, 2023
  086601ea
- [RISCV][NFC] Remove classes/multiclasses for SEW-aware instructions · 20d21017
  Pengcheng Wang authored Jun 09, 2023
  20d21017
- [RISCV][NFC] Replace log2 with !logtwo · 4c5db5a5
  Pengcheng Wang authored Jun 09, 2023
  4c5db5a5
- [X86][BF16] Split vNbf16 vectors according to vNf16 · c778ca20
  Phoebe Wang authored Jun 09, 2023
  c778ca20
- [X86][BF16] Share FP16 vector ABI with BF16 · 7634905a
  Phoebe Wang authored Jun 09, 2023
  7634905a
- [WebAssembly] Error out on invalid personality functions · 90073e8d
  Heejin Ahn authored Jun 03, 2023
  90073e8d
- [WebAssembly] Undef invalid DBG_VALUEs after RegColoring · 9e501945
  Heejin Ahn authored May 19, 2023
  9e501945
Jun 08, 2023
- Revert "Improve WebAssembly vector bitmask, mask reduction, and extending" · 100c756d
  Thomas Lively authored Jun 08, 2023
  100c756d
- AMDGPU: Fix regressions in integer mad matching · c01f284f
  Matt Arsenault authored Jun 05, 2023
  c01f284f
- [NVPTX] Allow using v4i32 for memcpy lowering. · c16b7e54
  Artem Belevich authored Jun 06, 2023
  c16b7e54
- [RDF] Create individual phi for each indivisible register · c6ddd04d
  Krzysztof Parzyszek authored May 29, 2023
  c6ddd04d
- [GlobalIsel][X86] Legalize G_SELECT · 0b771c67
  Thorsten Schütt authored Jun 08, 2023
  0b771c67
- [RISCV] Fix crash in lowerVECTOR_INTERLEAVE when VecVT is an LMUL=8 type. · 167f2fa1
  Craig Topper authored Jun 08, 2023
  167f2fa1
- [RISCV] Fix crash in lowerVECTOR_DEINTERLEAVE when VecVT is an LMUL=8 type. · 78f1a2ae
  Craig Topper authored Jun 08, 2023
  78f1a2ae
- [Hexagon] Make RDF copy propagation a bit more aggressive · 891b09a5
  Krzysztof Parzyszek authored Jun 08, 2023
  891b09a5
- [RISCV] Add VPatBinaryVL_V to VPatBinaryFPWVL_VV_VF_WV_WF like VPatBinaryWVL_VV_VX_WV_WX. · 11f3b159
  Craig Topper authored Jun 08, 2023
  11f3b159
- [x86][MC] Fix movdir64b addressing · 15f15ab2
  Akshay Khadse authored Jun 08, 2023
  15f15ab2
- AMDGPU: Don't run AMDGPUAttributor with -O0 · 846a360e
  Matt Arsenault authored Jun 06, 2023
  
  846a360e
- [X86] Prefer vmovmsk instead of vtest for alderlake. · b0bea80a
  Luo, Yuanke authored Jun 06, 2023
  b0bea80a
- [RISCV] Use Selection::getElementCount to simplify code. NFC · b7f5f489
  Craig Topper authored Jun 07, 2023
  
  b7f5f489
- [RISCV] Pass SDLoc by const reference. NFC · d3387277
  Craig Topper authored Jun 07, 2023
  
  d3387277
Jun 07, 2023
- [AArch64][SVE] Predicated mul pattern · 625273e7
  David Green authored Jun 07, 2023
  625273e7
- [AMDGPU] Switch to backwards scavenging in eliminateFrameIndex · 5aea839a
  Jay Foad authored May 16, 2023
  5aea839a
- [RISCV] Change riscv_vid_vl isel pattern to use _MASK instruction. · b03e6e65
  Craig Topper authored Jun 07, 2023
  b03e6e65
- AMDGPU: Remove r600 local id annotations in AMDGPULowerIntrinsics · 8eae660a
  Matt Arsenault authored Jun 07, 2023
  8eae660a
- [WebAssembly] Add ldexp{,f,l} libcall signatures · 5f6f8a8e
  Derek Schuff authored Jun 07, 2023
  5f6f8a8e
- Improve WebAssembly vector bitmask, mask reduction, and extending · 8392bf60
  Caleb Zulawski authored Jun 07, 2023
  8392bf60
- [RISCV] Use inheritance to reduce repeated code in RISCVInstrInfoV.td. NFC · 774b3363
  Craig Topper authored Jun 07, 2023
  774b3363
- [LV] Add option to tune the cost model, NFC · df19d872
  zhongyunde authored Jun 07, 2023
  df19d872