Commits · dd13be0bccc888926cb5a5e81912b89b28142669 · Roger Ferrer / llvm-epi · GitLab

Aug 20, 2015
- MIR Serialization: Serialize unnamed local IR values in memory operands. · dd13be0b
  Alex Lorenz authored Aug 19, 2015
  dd13be0b
- MIR Parser: parseIRValue should take in a constant pointer. NFC. · 36593ac5
  Alex Lorenz authored Aug 19, 2015
  36593ac5
- MIR Printer: Extract the code that prints IR slots to a separate function. NFC. · 55dc6f81
  Alex Lorenz authored Aug 19, 2015
  55dc6f81
- Allow Optionals to be compared to None · c7aaacde
  David Blaikie authored Aug 19, 2015
  c7aaacde
- [CMake] Kaleidoscope-Ch2: Don't pass -Wno-unused-private-field unconditionally. · 0ee6ce1c
  NAKAMURA Takumi authored Aug 19, 2015
  0ee6ce1c
Aug 19, 2015
- [x86] enable machine combiner reassociations for scalar double-precision min/max · 9e5927fd
  Sanjay Patel authored Aug 19, 2015
  9e5927fd
- [x86] enable machine combiner reassociations for scalar single-precision maximums · 4e3ee1e5
  Sanjay Patel authored Aug 19, 2015
  4e3ee1e5
- [DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding · 35f52826
  Simon Pilgrim authored Aug 19, 2015
  35f52826
- [AArch64][FastISel] Don't fold shifts with UB. · b12248e9
  Juergen Ributzka authored Aug 19, 2015
  b12248e9
- [X86] Emit more efficient >= comparisons against 0 · f25fe647
  David Majnemer authored Aug 19, 2015
  f25fe647
- [WebAssembly] Use the default alignment for SIMD types. · dde8dce6
  Dan Gohman authored Aug 19, 2015
  dde8dce6
- [DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE. · 989cbbd2
  Simon Pilgrim authored Aug 19, 2015
  989cbbd2
- Replace some calls to isa<LandingPadInst> with isEHPad() · ba275f99
  David Majnemer authored Aug 19, 2015
  ba275f99
- Minor tidying of regex in a test · 9c10414c
  Paul Robinson authored Aug 19, 2015
  9c10414c
- [Sparc]: asm-only support for the ldstub instruction. · 2362b69d
  Douglas Katzman authored Aug 19, 2015
  2362b69d
- MIR Parser: Rename 'MachineOperandWithLocation' to 'ParsedMachineOperand'. NFC. · feb6b439
  Alex Lorenz authored Aug 19, 2015
  feb6b439
- MIR Serialization: Serialize instruction's register ties. · 5ef93b0c
  Alex Lorenz authored Aug 19, 2015
  5ef93b0c
- Temporary fix for the self-host failures introduced by rL244921. · 5f1cea41
  Nemanja Ivanovic authored Aug 19, 2015
  5f1cea41
- MIR Serialization: Serialize defined registers that require 'def' register flag. · e66a7ccf
  Alex Lorenz authored Aug 19, 2015
  e66a7ccf
- [PeepholeOptimizer] Look through PHIs to find additional register sources · 27fd0692
  Bruno Cardoso Lopes authored Aug 19, 2015
  27fd0692
- [SPARC] Enable writing to floating-point-state register. · e5485c65
  Douglas Katzman authored Aug 19, 2015
  e5485c65
- [Kaleidoscope] More inter-chapter diff reduction. · 596aec96
  Lang Hames authored Aug 19, 2015
  596aec96
- [docs] Fix minor typo in CodingStandards.rst · cb23639d
  Vedant Kumar authored Aug 19, 2015
  cb23639d
- [Kaleidoscope] Clang-format the Kaleidoscope tutorials. · 59b0da88
  Lang Hames authored Aug 19, 2015
  59b0da88
- [AArch64] Improve short-form diags on long-form Match_InvalidOperand. · 9e00ec61
  Ahmed Bougacha authored Aug 19, 2015
  9e00ec61
- [SCEV] Fix GCC 4.8.0 ICE in lambda function · ff08a2ec
  Hal Finkel authored Aug 19, 2015
  ff08a2ec
- [LAA] Comment how memchecks are codegened · cdb791cd
  Adam Nemet authored Aug 19, 2015
  cdb791cd
- Revert "[AArch64] Simplify/refactor code to ease code review. NFC." · eb552e83
  Renato Golin authored Aug 19, 2015
  eb552e83
- x32. Fixes a bug in x32 exception handling. · 55817ee6
  Derek Schuff authored Aug 19, 2015
  55817ee6
- x32. Fixes jmp %reg in x32 · 5ab87edb
  JF Bastien authored Aug 19, 2015
  5ab87edb
- [Sparc] Rename LoadASR and StoreASR from r245360 to *ASI, as was intended. · 3b0fd753
  James Y Knight authored Aug 19, 2015
  3b0fd753
- Revert "[PeepholeOptimizer] Look through PHIs to find additional register sources" · 61009142
  Bruno Cardoso Lopes authored Aug 19, 2015
  61009142
- [SPARC] Fix BooleanContents, so that select of a trunc doesn't · d966fb6f
  James Y Knight authored Aug 19, 2015
  d966fb6f
- [AArch64] Simplify/refactor code to ease code review. NFC. · 494abf1a
  Chad Rosier authored Aug 19, 2015
  494abf1a
- [PeepholeOptimizer] Look through PHIs to find additional register sources · 0a1c1266
  Bruno Cardoso Lopes authored Aug 19, 2015
  0a1c1266
- [ARM] Add instruction selection patterns for vmin/vmax · ad1b19fc
  Silviu Baranga authored Aug 19, 2015
  ad1b19fc
- Map %fprs to %asr6 in the Sparc assembler parser. · 7d180c59
  Joerg Sonnenberger authored Aug 19, 2015
  7d180c59
- Emit <regmask R1 R2 R3 ...> instead of just <regmask> in IR dumps. · 1e97a0b3
  Daniel Sanders authored Aug 19, 2015
  1e97a0b3
- Revert "[X86] Widen the 'AND' mask if doing so shrinks the encoding size" · 85508e80
  Tobias Grosser authored Aug 19, 2015
  85508e80
- [X86] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize · 9fe42604
  Michael Kuperstein authored Aug 19, 2015
  9fe42604