Commits · e06290e53f2880962fef582f118482d70f1c27f0 · Roger Ferrer / llvm-epi · GitLab

Apr 21, 2022
- AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32 · e06290e5
  Petar Avramovic authored Apr 21, 2022
  e06290e5
- AMDGPU/GlobalISel: Precommit test for D124163 · 4e0dacb2
  Petar Avramovic authored Apr 21, 2022
  
  4e0dacb2
- [InstCombine] Fix typo in test (NFC) · ead231de
  Nikita Popov authored Apr 21, 2022
  ead231de
- [AArch64] Add `foldOverflowCheck` DAG combine · 81904454
  Karl Meakin authored Apr 21, 2022
  81904454
- [AArch64] Add lowerings for {ADD,SUB}CARRY and S{ADD,SUB}O_CARRY · 13403a70
  Karl Meakin authored Apr 21, 2022
  13403a70
- [InstCombine] Remove dead code (NFC) · 46c2b41d
  Nikita Popov authored Apr 21, 2022
  46c2b41d
- [AMDGPU]: Fix failing assertion in SIMachineScheduler · 607f8ced
  Jannik Silvanus authored Apr 21, 2022
  607f8ced
- [X86] Add test case for SetCCMOVMSK combine. · fa434726
  Luo, Yuanke authored Apr 21, 2022
  fa434726
- [InstCombine] Add tests for memset with undef/poison value (NFC) · 662f57ee
  Nikita Popov authored Apr 21, 2022
  
  662f57ee
- [InstCombine] Split up test for store with undef (NFC) · 9001edc5
  Nikita Popov authored Apr 21, 2022
  
  9001edc5
- [NVPTX] Fix LIT tests with default nameTableKind · 96e74870
  Andrew Savonichev authored Apr 19, 2022
  96e74870
- [InstCombine] Add nonpow2 (negative) test for D123374 · ac213375
  Simon Pilgrim authored Apr 21, 2022
  
  ac213375
- [PhaseOrdering] Remove RUN lines for legacy PM (NFC) · 20cf4f8a
  Nikita Popov authored Apr 21, 2022
  
  20cf4f8a
- Revert "[RISCV] Precommit test for D122634" · b1620d40
  Pengcheng Wang authored Apr 21, 2022
  b1620d40
- [Debugify] Limit number of processed functions for original mode · c5600aef
  Nikola Tesic authored Apr 21, 2022
  c5600aef
- [AMDGPU][MC][NFC][GFX940] Corrected an error position · 81af32b9
  Dmitry Preobrazhensky authored Apr 21, 2022
  81af32b9
- [BOLT] Add R_AARCH64_PREL16/32/64 relocations support · 48e894a5
  Alexey Moksyakov authored Apr 21, 2022
  48e894a5
- [AMDGPU][GFX90A+] Disabled ds_ordered_count and exp · b4231ac4
  Dmitry Preobrazhensky authored Apr 21, 2022
  b4231ac4
- [SimplifyCFG] Handle branch on same condition in pred more directly · 3df86e79
  Nikita Popov authored Apr 20, 2022
  3df86e79
- [SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension · 89882546
  Nikita Popov authored Apr 20, 2022
  89882546
- Force insert zero-idiom and break false dependency of dest register for several instructions. · 3e6b904f
  gpei-dev authored Apr 19, 2022
  3e6b904f
- Revert "[GVNSink] Regenerate test checks (NFC)" · 15fc293b
  Nikita Popov authored Apr 21, 2022
  15fc293b
- Revert "[RISCV] Do not outline CFI instructions when they are needed in EH" · ce838836
  Pengcheng Wang authored Apr 21, 2022
  ce838836
- [RISCV] Do not outline CFI instructions when they are needed in EH · 0d406889
  Pengcheng Wang authored Apr 21, 2022
  0d406889
- [RISCV] Precommit test for D122634 · 360d44e8
  Pengcheng Wang authored Apr 21, 2022
  360d44e8
- [GVNSink] Regenerate test checks (NFC) · 3b132300
  Nikita Popov authored Apr 21, 2022
  
  3b132300
- [CMake] Check for problematic MSVC + /arch:AVX configuration · 334522ca
  Tobias Hieta authored Apr 21, 2022
  334522ca
- [NFC] Code cleanups for coroutine after we remvoed legacy passes · 7eaa84ea
  Chuanqi Xu authored Apr 21, 2022
  
  7eaa84ea
- [RISCV] Don't emit fractional VIDs with negative steps · 3e678cb7
  Fraser Cormack authored Apr 19, 2022
  3e678cb7
- [RISCV] Add another test showing incorrect BUILD_VECTOR lowering · 627e2104
  Fraser Cormack authored Apr 19, 2022
  627e2104
- [RISCV] Make getInstSeqCost handle other Zb* instructions. · 186d5c8a
  Craig Topper authored Apr 20, 2022
  186d5c8a
- [Pipelines] Remove Legacy Passes in Coroutines · 483efc9a
  Chuanqi Xu authored Apr 21, 2022
  483efc9a
- [AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget. · 5bd87350
  hsmahesha authored Apr 21, 2022
  5bd87350
- [LoongArch] Add basic floating-point instructions definition · 3a49ad71
  Weining Lu authored Mar 29, 2022
  3a49ad71
- [AMDGPU] Split the lit test spill-vgpr-to-agpr.ll to different tests · 7895c873
  hsmahesha authored Apr 21, 2022
  7895c873
- [MC][NFC] Ensure tests that intended to cover compact unwind code paths do so · 9c4b2ff9
  Jez Ng authored Apr 20, 2022
  9c4b2ff9
Apr 20, 2022
- [Hexagon] Establish size limit for RegisterSet in hexbit · 16c93aaa
  Krzysztof Parzyszek authored Apr 20, 2022
  16c93aaa
- Reland "[COFF, ARM64] Add __break intrinsic" · 38612fbc
  Pengxuan Zheng authored Apr 15, 2022
  38612fbc
- [clang-tblgen] Automatically document options values · af7b98c3
  serge-sans-paille authored Apr 13, 2022
  af7b98c3
- Revert "[COFF, ARM64] Add __break intrinsic" · bff8356b
  Pengxuan Zheng authored Apr 20, 2022
  bff8356b