Commits · e0dc4ac28f0080a10a51a4627c880ca795f07ba0 · Roger Ferrer / llvm-epi · GitLab

Feb 23, 2022
- [NVPTX] Expose float tys min, max, abs, neg as builtins · e0dc4ac2
  Jakub Chlanda authored Feb 22, 2022
  e0dc4ac2
Feb 14, 2022
- [NVPTX] Fix NVPTXReplaceImageHandles for multiple uses of a texref · 88514017
  Dmitry Vassiliev authored Feb 15, 2022
  88514017
- [NVPTX] Fix bug with int_nvvm_rotate_b64 when operand immediate · 6645bfa8
  Dmitry Vassiliev authored Feb 15, 2022
  6645bfa8
- Revert D119669 "[NVPTX] Prefix "$L__" for branch label names" · a00ae86a
  Fangrui Song authored Feb 14, 2022
  a00ae86a
- [NVPTX] Prefix "$L__" for branch label names · cccef321
  Dmitry Vassiliev authored Feb 14, 2022
  cccef321
Feb 10, 2022
- [NVPTX] Use align attribute for kernel pointer arg alignment · 1c729d71
  Nikita Popov authored Feb 08, 2022
  1c729d71
- [NVPTX] Eliminate StoreRetval instructions with undef operand · 0f9109cc
  Daniil Kovalev authored Feb 10, 2022
  0f9109cc
Jan 28, 2022
- [NVPTX] Remove fmin/fmax.NaN.f64 again · f7da4a5d
  Christian Sigg authored Jan 27, 2022
  f7da4a5d
Jan 26, 2022
- [NVPTX] NFC: Remove unused arguments and attribute from test · dc441d77
  Christian Sigg authored Jan 26, 2022
  
  dc441d77
Jan 13, 2022
- [Clang][NVPTX]Add NVPTX intrinsics and builtins for CUDA PTX cvt sm80 instructions · bef3eb83
  Jack Kirk authored Jan 13, 2022
  bef3eb83
- [NVPTX] Add version test for sm_75, sm_80, sm_86. · ffee3b2f
  Christian Sigg authored Jan 13, 2022
  ffee3b2f
- [NVPTX] Add fmin/fmax.NaN lowering for sm_80+. · efb8d4cf
  Christian Sigg authored Jan 13, 2022
  efb8d4cf
- [NVPTX] Lower fp16 fminnum, fmaxnum to native on sm_80. · cc1b9acf
  Christian Sigg authored Jan 12, 2022
  cc1b9acf
Dec 07, 2021
- [NVPTX] Auto-generate tests for sufrace and texture instructions · e29ba97d
  Andrew Savonichev authored Nov 15, 2021
  e29ba97d
Nov 10, 2021
- [NVPTX] Add imm variants for surface and texture instructions · 00aa0aeb
  Andrew Savonichev authored Nov 10, 2021
  00aa0aeb
Nov 03, 2021
- [NVPTX] Mark special registers as reserved · 123ad720
  Andrew Savonichev authored Nov 03, 2021
  123ad720
- [NVPTX] Add MoveParam instruction for TargetExternalSymbol operand · 0e707855
  Andrew Savonichev authored Nov 03, 2021
  0e707855
- [NVPTX] Copy machine operand flags in TII::insertBranch · 30a3a17d
  Andrew Savonichev authored Nov 03, 2021
  30a3a17d
Oct 20, 2021
- [NVPTX] Add a late SROA pass which allows optimizing away more allocas. · b6b7fe60
  Artem Belevich authored Oct 08, 2021
  b6b7fe60
Oct 19, 2021
- [opt] Directly translate -O# to -passes='default<O#>' · 15fefcb9
  Arthur Eubanks authored Oct 18, 2021
  15fefcb9
Oct 14, 2021
- [NVPTX] Add VRFrame and VRFrameLocal to integer register classes · 51eefa81
  Andrew Savonichev authored Oct 14, 2021
  51eefa81
Sep 27, 2021
- Fix tests defaulting to incorrect triples on AIX · 56049b71
  Jake Egan authored Sep 27, 2021
  56049b71
Sep 09, 2021
- [NVPTX] Simplify and generalize constant printer. · d99a83b4
  Artem Belevich authored Aug 27, 2021
  d99a83b4
Aug 07, 2021
- [NVPTX] Add NVPTX intrinsics for CUDA PTX 6.5 ldmatrix instructions · 1b4c85fc
  Steffen Larsen authored Aug 06, 2021
  1b4c85fc
Jul 31, 2021
- Fix the default alignment of i1 vectors. · bdd55b2f
  Eli Friedman authored Jul 31, 2021
  bdd55b2f
Jul 18, 2021
- [NVPTX] Add select(cc,binop(),binop()) fast-math tests · fcb710a7
  Simon Pilgrim authored Jul 18, 2021
  fcb710a7
Jul 15, 2021
- [NVPTX, CUDA] Add .and.popc variant of the b1 MMA instruction. · d774b4aa
  Artem Belevich authored Jul 02, 2021
  d774b4aa
- [NVPTX] Tweak fast-math tests to avoid select(binop(x,y),binop(x,z)) fold · 3cc38703
  Simon Pilgrim authored Jul 15, 2021
  3cc38703
- [NVPTX] Add selp.f32 checks to select(cond,fpbinop(),fpbinop()) tests · e21663d3
  Simon Pilgrim authored Jul 15, 2021
  e21663d3
Jul 07, 2021
- tests/CodeGen: Use %python lit substitution when invoking python · 7f1c077c
  Tom Stellard authored Jul 06, 2021
  7f1c077c
Jun 30, 2021
- [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX 6.5 and 7.0 WMMA and MMA instructions · 3644726a
  Steffen Larsen authored Jun 28, 2021
  3644726a
Jun 17, 2021
- Update @llvm.powi to handle different int sizes for the exponent · 4c7f820b
  Bjorn Pettersson authored Mar 26, 2021
  4c7f820b
May 24, 2021
- Revert "[NFC] remove explicit default value for strboolattr attribute in tests" · 4ab3041a
  serge-sans-paille authored May 24, 2021
  4ab3041a
- [NFC] remove explicit default value for strboolattr attribute in tests · bda6e5be
  serge-sans-paille authored May 23, 2021
  bda6e5be
- [NVPTX] Fix lowering of frem for negative values · 505933a4
  thomasraoux authored May 24, 2021
  505933a4
May 17, 2021
- [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX redux.sync instructions · f226e28a
  Steffen Larsen authored May 17, 2021
  f226e28a
- [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX cp.async instructions · 02c24688
  Stuart Adams authored May 17, 2021
  02c24688
Apr 27, 2021
- [NVPTX] Enable lowering of atomics on local memory · 7aa3cad4
  William S. Moses authored Mar 15, 2021
  7aa3cad4
- Revert "[NVPTX] Enable lowering of atomics on local memory" · 8ede9649
  William S. Moses authored Apr 26, 2021
  8ede9649
- [NVPTX] Enable lowering of atomics on local memory · fede99d3
  William S. Moses authored Mar 15, 2021
  fede99d3