Commits · e20391fc5d6a72e712449142e803fb81b8a75153 · Roger Ferrer / llvm-epi · GitLab

Nov 26, 2021
- [LoopVectorize] When tail-folding, don't always predicate uniform loads · e20391fc
  David Sherwood authored Oct 25, 2021
  e20391fc
- [AArch64][SVE] Generate ASRD instructions for power of 2 signed divides · eafbaca9
  Bradley Smith authored Nov 18, 2021
  eafbaca9
- [ARM] Generate VCTP from SETCC · c76d6dd1
  David Green authored Nov 26, 2021
  c76d6dd1
- [DAG] SimplifyDemandedVectorElts - attempt to handle ADD(x,x) as single use · 2778f9a9
  Simon Pilgrim authored Nov 26, 2021
  2778f9a9
- [ARM] Add some vctp from setcc tests. NFC · 40e7d4cd
  David Green authored Nov 26, 2021
  
  40e7d4cd
- [CodeGen] Add scalable vector support for lowering of llvm.get.active.lane.mask · 86137fb7
  David Sherwood authored Nov 22, 2021
  86137fb7
- [AMDGPU] Make vector superclasses allocatable · 654c89d8
  Christudasan Devadasan authored Sep 05, 2021
  654c89d8
Nov 25, 2021
- [DebugInfo][InstrRef] Add extra indirection for NRVO tests · 536b9eb3
  Jeremy Morse authored Nov 25, 2021
  536b9eb3
- [PowerPC] Prevent the optimizer from producing wide vector types in IR. · 150681f2
  Amy Kwan authored Nov 25, 2021
  150681f2
- [NFC][llvm] Inclusive language: replace master with main in dbg-call-site-spilled-arg.mir · 34303d3d
  Quinn Pham authored Nov 17, 2021
  34303d3d
- [ARM] Convert fptoi.sat to fixed point multiply · fbb61adb
  David Green authored Nov 25, 2021
  fbb61adb
- [DebugInfo][InstrRef] Track variable assignments in out-of-scope blocks · 102d2a8a
  Jeremy Morse authored Nov 25, 2021
  102d2a8a
- [ARM] Add fptosi.sat variants of the fixed point vcvt tests. NFC · e6cca312
  David Green authored Nov 25, 2021
  
  e6cca312
- [PowerPC/ Regenerate fp128-bitcast-after-operation test checks · a25e08dd
  Simon Pilgrim authored Nov 25, 2021
  
  a25e08dd
- Revert "[SLP]Improve analysis/emission of vector operands for alternate nodes." · 4675a165
  Alexey Bataev authored Nov 25, 2021
  4675a165
- [NFC][llvm] Inclusive language: reword uses of sanity test and check · 7f7dac71
  Zarko Todorovski authored Nov 24, 2021
  7f7dac71
- [DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl (REAPPLIED) · 63b1e58f
  Simon Pilgrim authored Nov 25, 2021
  63b1e58f
- [SDAG] Allow Unknown sizes when refining MMO alignments. NFC · 3a700cab
  David Green authored Nov 25, 2021
  3a700cab
- GlobalISel: remove assert that memcpy Src and Dst addrspace must be identical · 0332d105
  Jameson Nash authored Oct 21, 2021
  0332d105
Nov 24, 2021
- DWARFVerifier: Don't parse all units twice · cd93ab89
  David Blaikie authored Nov 24, 2021
  cd93ab89
- [ConstraintElimination] Add additional tests. · 175d68dd
  Florian Hahn authored Nov 24, 2021
  
  175d68dd
- Move some tests from instcombine to phase ordering. NFC. · 7e1dc12f
  Stanislav Mekhanoshin authored Nov 24, 2021
  7e1dc12f
- [SLP]Improve analysis/emission of vector operands for alternate nodes. · 496254cf
  Alexey Bataev authored Nov 17, 2021
  496254cf
- [DebugInfo][InstrRef] Cope with win32 calls changing SP in LiveDebugValues · bfadc5dc
  Jeremy Morse authored Nov 24, 2021
  bfadc5dc
- Revert "[InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))" · 9300b133
  Stanislav Mekhanoshin authored Nov 24, 2021
  9300b133
- [DebugInfo][InstrRef] Ignore SP clobbers on call instructions even more · 133e25f9
  Jeremy Morse authored Nov 24, 2021
  133e25f9
- [DebugInfo] Reflect switched variable order from instruction referencing · eb00e79b
  Jeremy Morse authored Nov 24, 2021
  eb00e79b
- [AArch64] Add regression test for D114354 · f9352034
  Simon Pilgrim authored Nov 24, 2021
  
  f9352034
- [NFC][LAA] Precommit tests for forked pointers · dee810e1
  Graham Hunter authored Aug 12, 2021
  dee810e1
- [LoopAccessAnalysis][SVE] Bail out for scalable vectors · 787b66eb
  Peter Waller authored Nov 18, 2021
  787b66eb
- [NFC][X86] Inclusive language: Rename master label in x86-shrink-wrapping.ll · 6ee69c0d
  Quinn Pham authored Nov 15, 2021
  6ee69c0d
- [X86][MS] Add test cases to show wrong alignment in vector variable arguments. NFC · 5ba795c6
  Phoebe Wang authored Nov 24, 2021
  
  5ba795c6
- [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to... · cd8d2195
  Roman Lebedev authored Nov 24, 2021
  cd8d2195
- [AArch64][SVE] Recognize all ones mask during fixed mask generation · 080ef0b6
  Bradley Smith authored Nov 22, 2021
  080ef0b6
- Revert "[DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl" · d3278723
  Benjamin Kramer authored Nov 24, 2021
  d3278723
- [LV] Use patterns in some induction tests, to make more robust. (NFC) · a7648eb2
  Florian Hahn authored Nov 24, 2021
  
  a7648eb2
- [X86] Add BMI test coverage for for or-lea with no common bits tests · 73fd3696
  Simon Pilgrim authored Nov 24, 2021
  73fd3696
- [X86] Add D113970 tests cases for or-lea with no common bits. · 19be7f97
  Omer Aviram authored Nov 24, 2021
  19be7f97
- [InstSimplify] fold xor logic of 2 variables, part 2 · b326c058
  Sanjay Patel authored Nov 23, 2021
  b326c058
- [InstSimplify] add tests for xor logic; NFC · 823fc8aa
  Sanjay Patel authored Nov 23, 2021
  
  823fc8aa