Commits · e4c8b9b78cb2995576c52d30875bfe4dbbdee7e3 · Roger Ferrer / llvm-epi · GitLab

Apr 07, 2017
- Turn on -addr-sink-using-gep by default. · 5fba1e53
  Eli Friedman authored Apr 06, 2017
  5fba1e53
Apr 05, 2017
- [DAGCombine] Support FMF contract in fused multiple-and-sub too · d5ffdd36
  Adam Nemet authored Apr 05, 2017
  d5ffdd36
- [AArch64] Avoid partial register deps on insertelt of load into lane 0. · d3c03a5d
  Ahmed Bougacha authored Apr 04, 2017
  d3c03a5d
Apr 04, 2017
- [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia · 9eb0a1e0
  Petr Hosek authored Apr 04, 2017
  9eb0a1e0
- [tablegen][globalisel] Add support for nested instruction matching. · bee5739a
  Daniel Sanders authored Apr 04, 2017
  bee5739a
Apr 03, 2017
- [CodeGenPrep] move aarch64-type-promotion to CGP · dee55658
  Jun Bum Lim authored Apr 03, 2017
  dee55658
Apr 01, 2017
- Revert "Localizer fun" · fc8f048c
  Quentin Colombet authored Apr 01, 2017
  fc8f048c
- [RegBankSelect] Support REG_SEQUENCE for generic mapping · 7f643189
  Quentin Colombet authored Apr 01, 2017
  7f643189
- Localizer fun · 3c40b366
  Quentin Colombet authored Apr 01, 2017
  3c40b366
Mar 31, 2017
- [AArch64] Add new subtarget feature to fold LSL into address mode. · 2aba753e
  Balaram Makam authored Mar 31, 2017
  2aba753e
Mar 30, 2017
- [DAGCombiner] Initial support for the fast-math flag contract · edaec6de
  Adam Nemet authored Mar 30, 2017
  edaec6de
- [CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks. · 6dd60824
  Ahmed Bougacha authored Mar 30, 2017
  6dd60824
Mar 29, 2017
- Add a similar test for tailcall optimization as in r270287 for aarch64. · 69b191c6
  Eric Christopher authored Mar 28, 2017
  69b191c6
Mar 27, 2017
- [GlobalISel][AArch64] Fold FI into LDR/STR ui addressing mode. · f75782f9
  Ahmed Bougacha authored Mar 27, 2017
  f75782f9
- [GlobalISel][AArch64] Fold G_GEP into LDR/STR ui addressing mode. · 8a654085
  Ahmed Bougacha authored Mar 27, 2017
  8a654085
- [GlobalISel][AArch64] Select store of zero to WZR/XZR. · 85a66a6d
  Ahmed Bougacha authored Mar 27, 2017
  85a66a6d
- [GlobalISel][AArch64] Select CBZ. · 641cb203
  Ahmed Bougacha authored Mar 27, 2017
  641cb203
- [GlobalISel][AArch64] Use proper constant types in test. NFC. · c1cbcee1
  Ahmed Bougacha authored Mar 27, 2017
  c1cbcee1
- [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not having side effects. · 862a4127
  Chad Rosier authored Mar 27, 2017
  862a4127
Mar 22, 2017
- [GlobalISel]: Create VREGs for ConstantInt args · bc389bad
  Aditya Nandakumar authored Mar 22, 2017
  bc389bad
- [GlobalISel] Update DBG_VALUEs referencing DCE'd instructions. · 15b3e8a9
  Ahmed Bougacha authored Mar 21, 2017
  15b3e8a9
- [GlobalISel] Don't translate br to layout successor. · e8e1fa3a
  Ahmed Bougacha authored Mar 21, 2017
  e8e1fa3a
Mar 21, 2017
- GlobalISel: widen booleans by zero-extending to a byte. · dd4b9d6d
  Tim Northover authored Mar 21, 2017
  dd4b9d6d
- [GlobalISel] Fix shufflevector tests · 044e0032
  Volkan Keles authored Mar 21, 2017
  044e0032
- [GlobalISel] Translate shufflevector · 75bdc769
  Volkan Keles authored Mar 21, 2017
  75bdc769
Mar 20, 2017
- GlobalISel: add implicit defs & uses when mutating an instruction. · 4340d64f
  Tim Northover authored Mar 20, 2017
  4340d64f
- Add test case for merging of chained stores of mismatched type. · f5f0864a
  Nirav Dave authored Mar 20, 2017
  f5f0864a
- GlobalISel: allow quad-precision values to be dumped. · 89268b18
  Tim Northover authored Mar 20, 2017
  89268b18
- [GlobalISel] Use the correct calling conv for calls · d79253a9
  Diana Picus authored Mar 20, 2017
  d79253a9
Mar 19, 2017
- [GlobalISel] Don't select trivially dead instructions. · 931904d7
  Ahmed Bougacha authored Mar 19, 2017
  931904d7
- [GlobalISel][AArch64] Add DBG_VALUE select test. NFC. · 48bcd22c
  Ahmed Bougacha authored Mar 19, 2017
  48bcd22c
- [GlobalISel][AArch64] Split out cast select tests. NFC. · dcd416a4
  Ahmed Bougacha authored Mar 19, 2017
  dcd416a4
Mar 17, 2017
- [Outliner] Add outliner for AArch64 · ea8cc09b
  Jessica Paquette authored Mar 17, 2017
  ea8cc09b
- [CodeGenPrep]Restructure promoting Ext to form ExtLoad · 4230101d
  Jun Bum Lim authored Mar 17, 2017
  4230101d
- [AArch64] Use alias analysis in the load/store optimization pass. · a69dcb6b
  Chad Rosier authored Mar 17, 2017
  a69dcb6b
Mar 16, 2017
- [globalisel] Correct one more simple immediate that should be a ConstantInt. · 16846764
  Daniel Sanders authored Mar 16, 2017
  16846764
- [globalisel] Correct G_CONSTANT path of selectArithImmed() · 0e642028
  Daniel Sanders authored Mar 16, 2017
  0e642028
Mar 15, 2017
- [GlobalISel] Avoid translating synthetic constants to new G_CONSTANTS. · 2fb80307
  Ahmed Bougacha authored Mar 15, 2017
  2fb80307
- [GlobalISel][AArch64] Select ADDXri. · 62cd73d9
  Ahmed Bougacha authored Mar 15, 2017
  62cd73d9
- [GlobalISel] Insert translated switch icmp blocks after switch parent. · 07f247b6
  Ahmed Bougacha authored Mar 15, 2017
  07f247b6