Commits · e5412b882ad44a9cb27b729b6281560c2e2e2755 · Roger Ferrer / llvm-epi · GitLab

Sep 15, 2017
- [lit] Add a lit.llvm module that all test suites can use. · e5412b88
  Zachary Turner authored Sep 15, 2017
  e5412b88
- [WebAssembly] Use a separate wasm data segment for each global symbol · 7c395943
  Sam Clegg authored Sep 14, 2017
  7c395943
Sep 14, 2017
- AMDGPU: Fix violating constant bus restriction · c317287f
  Matt Arsenault authored Sep 14, 2017
  c317287f
- [TargetTransformInfo] Detect 0 latency instructions · 21f8fad9
  Guozhi Wei authored Sep 14, 2017
  21f8fad9
- AMDGPU: Fix assert on alloca of array of struct · 37ab4cf8
  Matt Arsenault authored Sep 14, 2017
  37ab4cf8
- [bpf] Fix test to always use little endian. · 6819a7a1
  Simon Dardis authored Sep 14, 2017
  6819a7a1
- AMDGPU: Stop modifying SP in call sequences · defe3717
  Matt Arsenault authored Sep 14, 2017
  defe3717
- Invoke GetInlineCost for legality check before inline functions in SampleProfileLoader. · 3a81f84d
  Dehao Chen authored Sep 14, 2017
  3a81f84d
- [mips] Implement the 'dext' aliases and it's disassembly alias. · 55e44673
  Simon Dardis authored Sep 14, 2017
  55e44673
- Adapt more testcases for llvm-dwarfdump changes. · 82959cd5
  Adrian Prantl authored Sep 14, 2017
  82959cd5
- AMDGPU: Make frame register caller preserved · 6efd082c
  Matt Arsenault authored Sep 14, 2017
  6efd082c
- llvm-dwarfdump: support dumping static archives. · 5fd3d49b
  Adrian Prantl authored Sep 14, 2017
  5fd3d49b
- TableGen support for parameterized register class information · 779d98e1
  Krzysztof Parzyszek authored Sep 14, 2017
  779d98e1
- [lit] Force site configs to be run before source-tree configs · a0e55b64
  Zachary Turner authored Sep 14, 2017
  a0e55b64
- [IfConversion] More simple, correct dead/kill liveness handling · 6ca02b25
  Krzysztof Parzyszek authored Sep 14, 2017
  6ca02b25
- [mips] Implement the 'dins' aliases. · 6f83ae38
  Simon Dardis authored Sep 14, 2017
  6f83ae38
- [InstSimplify] fold sdiv/srem based on compare of dividend and divisor · 0d4fd5b6
  Sanjay Patel authored Sep 14, 2017
  0d4fd5b6
- Add newline to end of test file. NFC. · 4d6d74e2
  Chad Rosier authored Sep 14, 2017
  4d6d74e2
- [X86] Regenerate test. NFCI. · 0b220c75
  Simon Pilgrim authored Sep 14, 2017
  0b220c75
- Regenerate test (broadcast comment). NFCI. · 47d8f624
  Simon Pilgrim authored Sep 14, 2017
  47d8f624
- [X86] When applying the shuffle-to-zero-extend transformation on floating... · ab68449c
  Ayman Musa authored Sep 14, 2017
  ab68449c
- [mips] Pick the right variant of DINS upfront and enable target instruction verification · 28365b33
  Simon Dardis authored Sep 14, 2017
  28365b33
- [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) · 8bd2d878
  Simon Pilgrim authored Sep 14, 2017
  8bd2d878
- Fix line endings. NFCI. · 337b2d00
  Simon Pilgrim authored Sep 14, 2017
  337b2d00
- Fix line endings. NFCI. · 11e2969a
  Simon Pilgrim authored Sep 14, 2017
  11e2969a
- [XRay][DebugInfo] Update the test to use a specific target · d7b3add7
  Dean Michael Berris authored Sep 14, 2017
  d7b3add7
- [PM/CGSCC] Teach the CGSCC pass manager components to gracefully handle · 7376ae88
  Chandler Carruth authored Sep 14, 2017
  7376ae88
- [XRay][DebugInfo] Remove -debug-compile from test invocation of llc · b21f580d
  Dean Michael Berris authored Sep 14, 2017
  b21f580d
- [LV] Fix maximum legal VF calculation · 682cfc1d
  Alon Kom authored Sep 14, 2017
  682cfc1d
- [XRay][CodeGen] Use the current function symbol as the associated symbol for... · 01fd7c8b
  Dean Michael Berris authored Sep 14, 2017
  01fd7c8b
- Revert "Invoke GetInlineCost for legality check before inline functions in SampleProfileLoader." · 48624d32
  Vitaly Buka authored Sep 14, 2017
  48624d32
- Reland r313157, "ThinLTO: Correctly follow aliasee references when dead... · cfbd0892
  Peter Collingbourne authored Sep 14, 2017
  cfbd0892
- Revert r313157 "ThinLTO: Correctly follow aliasee references when dead stripping." · ae050afe
  Hans Wennborg authored Sep 14, 2017
  ae050afe
- Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place. · 38fac590
  NAKAMURA Takumi authored Sep 14, 2017
  38fac590
- AMDGPU: Don't spill SP reg like a normal CSR · ecb43ef1
  Matt Arsenault authored Sep 13, 2017
  ecb43ef1
- Revert r312719 "[MachineCombiner] Update instruction depths incrementally for large BBs." · 06e2a384
  Hans Wennborg authored Sep 13, 2017
  06e2a384
- Update testcase that was XFAILed on Darwin for llvm-dwarfdump change. · c1138014
  Adrian Prantl authored Sep 13, 2017
  c1138014
- Allow target to decide when to cluster loads/stores in misched · 7fe9a5d9
  Stanislav Mekhanoshin authored Sep 13, 2017
  7fe9a5d9
- llvm-dwarfdump: automatically dump both regular and .dwo variant of sections · 3ae35eb5
  Adrian Prantl authored Sep 13, 2017
  3ae35eb5
Sep 13, 2017
- [codeview] VLAs and unsized arrays should use a size of zero · 89af112c
  Reid Kleckner authored Sep 13, 2017
  89af112c