Commits · e5c4308ba121cb6b1c2bbdd2684acff9eb13ffc8 · Roger Ferrer / llvm-epi · GitLab

Jun 14, 2022
- [InterleavedLoadComb] Rename uses when inserting new uses. · e5c4308b
  Florian Hahn authored Jun 14, 2022
  e5c4308b
- [AArch64][SME] Add load/store intrinsics · 2c4e4475
  Rosie Sumpter authored Jun 06, 2022
  2c4e4475
- [Greedy RegAlloc] Fix the handling of split register in last chance re-coloring. · 095bf6be
  Serguei Katkov authored Jun 08, 2022
  095bf6be
Jun 13, 2022
- [AArch64] Autogenerate sve-fixed-length tests. NFC · 9ecf4234
  Amaury Séchet authored Jun 06, 2022
  9ecf4234
- [DAG] visitINSERT_VECTOR_ELT - attempt to reconstruct BUILD_VECTOR before other fold interfere · 7d8fd4f5
  Simon Pilgrim authored Jun 13, 2022
  7d8fd4f5
- [test] Add test for D126700 NFC · 3cefcdb8
  zhongyunde authored Jun 13, 2022
  
  3cefcdb8
- [AArch64] Mark smull and umull as commutative. · dbac0e83
  David Green authored Jun 13, 2022
  
  dbac0e83
Jun 12, 2022
- [AArch64] Look through bitcast when looking for extract_high subvector · 963c0a01
  David Green authored Jun 12, 2022
  963c0a01
- Autogenerate sve-fixed-length-frame-offests-crash.ll . NFC · 982f65a6
  Amaury Séchet authored Jun 12, 2022
  
  982f65a6
- Autogenerate sve-fixed-length-bitselect.ll . NFC · d35da7f7
  Amaury Séchet authored Jun 12, 2022
  
  d35da7f7
Jun 11, 2022
- [DAG] visitINSERT_VECTOR_ELT - add <1 x ???>... · 44a0cd25
  Simon Pilgrim authored Jun 11, 2022
  44a0cd25
- [AArch64] Generate FADDP from shuffled fadd · 338fd211
  David Green authored Jun 11, 2022
  338fd211
- [AArch64] Add extra faddp codegen tests. NFC · 82fcd739
  David Green authored Jun 11, 2022
  
  82fcd739
- [SelectionDAG] Remove invalid TypeSize conversion from WidenVecOp_BITCAST. · 10d55c46
  Paul Walker authored Jun 06, 2022
  10d55c46
Jun 10, 2022
- Fix interaction of CFI instructions with MachineOutliner. · 0ff51d5d
  Eli Friedman authored Jun 10, 2022
  0ff51d5d
- [clang] Add support for __builtin_memset_inline · 38637ee4
  Guillaume Chatelet authored Jun 07, 2022
  38637ee4
Jun 09, 2022
- [AArch64][SVE] Don't crash on pre-legalizer types in extload combine. · c68b469e
  Ahmed Bougacha authored May 26, 2022
  c68b469e
- [SelectionDAG] Handle bzero/memset libcalls globally instead of per target · dc336797
  Guillaume Chatelet authored Jun 08, 2022
  dc336797
Jun 08, 2022
- [MC] Add 'G' to augmentation string for MTE instrumented functions · 0593ce5f
  Florian Mayer authored Jun 02, 2022
  0593ce5f
- [AArch64] Remove ToBeRemoved from AArch64MIPeepholeOpt · a1aef4f3
  David Green authored Jun 08, 2022
  a1aef4f3
- [AArch64] Add tests for bitcast high register extracts. NFC · 33ead6e4
  David Green authored Jun 08, 2022
  
  33ead6e4
- [SelectionDAG] Remove invalid TypeSize conversion from PromoteIntRes_BITCAST. · d8835421
  Paul Walker authored Jun 06, 2022
  d8835421
- [SVE] Fix incorrect code generation for bitcasts of unpacked vector types. · a1121c31
  Paul Walker authored May 31, 2022
  a1121c31
Jun 07, 2022
- [AArch64] Remove isDef32 · bccbf527
  David Green authored Jun 07, 2022
  bccbf527
- llvm-reduce: Don't assert on functions which don't track liveness · 56303223
  Matt Arsenault authored Apr 13, 2022
  56303223
- [AArch64] Regenerate arm64-shifted-sext.ll and add a test from #55833. NFC · 6468feae
  David Green authored Jun 07, 2022
  
  6468feae
Jun 06, 2022
- [GISel] Add new combines for G_ADD · b7fcf663
  Michael Kitzan authored May 18, 2022
  b7fcf663
- [AArch64] Generate ADDP from shuffled add · 4ea1b435
  David Green authored Jun 06, 2022
  4ea1b435
Jun 03, 2022
- [SVE] Refactor sve-bitcast.ll to include all combinations for legal types. · 2dde272d
  Paul Walker authored May 31, 2022
  2dde272d
- [AArch64] Add extra addp codegen tests. NFC · 79e3b043
  David Green authored Jun 03, 2022
  
  79e3b043
- [SSAUpdaterImpl] Do not generate phi node with all the same incoming values · 24e16e4a
  Serguei Katkov authored May 27, 2022
  24e16e4a
- [MachineSSAUpdate] Add a test for redundant phi generation. · c4d955dd
  Serguei Katkov authored May 27, 2022
  
  c4d955dd
Jun 02, 2022
- [SVE] Fixed custom lowering of ISD::INSERT_SUBVECTOR. · 48ea26a3
  Paul Walker authored May 22, 2022
  48ea26a3
- [IR] Enable opaque pointers by default · 41d5033e
  Nikita Popov authored May 31, 2022
  41d5033e
- [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. · a92ed167
  Hendrik Greving authored Jun 02, 2022
  a92ed167
Jun 01, 2022
- Revert "[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4." · e9d05cc7
  Hendrik Greving authored Jun 01, 2022
  e9d05cc7
- [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. · 430ac5c3
  Hendrik Greving authored May 06, 2022
  430ac5c3
- [AArch64][test] Replace -march with -mtriple for llc RUN lines · 873d2aff
  Fangrui Song authored May 31, 2022
  873d2aff
May 31, 2022
- [CodeGen][AArch64] Add support for LDAPR · a72cc958
  Alexander Shaposhnikov authored May 31, 2022
  a72cc958
- [AArch64] Remove references to Streaming SVE from target features. · 9c38fc11
  Sander de Smalen authored May 18, 2022
  9c38fc11