Commits · e657c84fa10e36ccf9b36bfeba26219ffbb39773 · Roger Ferrer / llvm-epi · GitLab

Apr 19, 2021
- [WebAssembly] Use v128.const instead of splats for constants · e657c84f
  Thomas Lively authored Apr 19, 2021
  e657c84f
- [AMDGPU] Remove error check for indirect calls and add missing queue-ptr · 6a4d9cb7
  madhur13490 authored Apr 16, 2021
  6a4d9cb7
- [AArch64] Peephole rule to remove redundant cmp after cset. · 2ec16103
  Pavel Iliin authored Mar 09, 2021
  2ec16103
- [RISCV] Pad v4i1/v2i1/v1i1 stores with 0s to make a full byte. · 7ed01a42
  Craig Topper authored Apr 19, 2021
  7ed01a42
- [AArch64][GlobalISel] Implement custom legalization for s32 and s64 G_CTPOP · 65f257a2
  Jessica Paquette authored Apr 13, 2021
  65f257a2
- [AArch64][GlobalISel] Regbankselect + select @llvm.aarch64.neon.uaddlv · 91bbb914
  Jessica Paquette authored Apr 13, 2021
  91bbb914
- [AMDGPU] Remove MachineDCE after SIFoldOperands · ef443390
  Jay Foad authored Apr 08, 2021
  ef443390
- [RISCV] Lower vector shuffles to vrgather operations · c9a93c3e
  Fraser Cormack authored Apr 15, 2021
  c9a93c3e
- [CodeGen] Improve code generation for clamping of constant indices with scalable vectors · 83f5fa51
  David Sherwood authored Apr 16, 2021
  83f5fa51
- [GreedyRA ORE] Add stats for copy of virtual registers. · 9f33943e
  Serguei Katkov authored Apr 09, 2021
  9f33943e
- [Greedy RA] Add a check to MachineVerifier · 61d22f2e
  Serguei Katkov authored Apr 13, 2021
  61d22f2e
Apr 17, 2021
- [PowerPC] Minor improvement for insert_vector_elt codegen · ff769dd1
  Nemanja Ivanovic authored Apr 16, 2021
  ff769dd1
Apr 16, 2021
- [funcattrs] Add the maximal set of implied attributes to definitions · f549176a
  Philip Reames authored Apr 16, 2021
  f549176a
- [WebAssembly] Remove saturating fp-to-int target intrinsics · 5c729750
  Thomas Lively authored Apr 16, 2021
  5c729750
- [ARM] Prevent phi-node-elimination from generating copy above t2WhileLoopStartLR · 093f1828
  Malhar Jajoo authored Apr 16, 2021
  093f1828
- Restore lit feature object-emission. Omit DebugInfo/Generic on XCore. · 23f8993f
  Nigel Perks authored Aug 18, 2020
  23f8993f
- [NFC][AArch64][SVE] Move select-sve.ll tests to sve-select.ll · 394eb918
  Caroline Concatto authored Apr 16, 2021
  394eb918
- [ARM] Combine sub 0, csinc X, Y, CC -> csinv -X, Y, CC · 00a60454
  David Green authored Apr 16, 2021
  00a60454
- [RISCV] Rerun stack test through update_llc_test_checks.py · ec0f7c69
  Fraser Cormack authored Apr 16, 2021
  ec0f7c69
- [Aarch64] handle "o" inline asm memory constraints · bb7016f8
  Nick Desaulniers authored Apr 15, 2021
  bb7016f8
- [RISCV] Don't emit save-restore call if function is a interrupt handler · 2893570e
  Jim Lin authored Apr 16, 2021
  2893570e
Apr 15, 2021
- [clang][AArch64] Correctly align HFA arguments when passed on the stack · f9d932e6
  Momchil Velikov authored Apr 15, 2021
  f9d932e6
- [Hexagon] Avoid infinite loops in type legalization when lowering SETCC · 28067812
  Krzysztof Parzyszek authored Apr 15, 2021
  28067812
- [LSR] Fix for pre-indexed generated constant offset · bf147c46
  Stelios Ioannou authored Apr 15, 2021
  bf147c46
- [AMDGPU] Fix large return values with amdgpu_gfx · 7842e172
  Sebastian Neubauer authored Apr 01, 2021
  7842e172
- [X86] combineCMP - fold cmpEQ/NE(TRUNC(X),0) -> cmpEQ/NE(X,0) · 9d57a77b
  Simon Pilgrim authored Apr 15, 2021
  9d57a77b
- [AArch64][NEON] Match (or (and -a b) (and (a+1) b)) => bit select · 22c017f0
  Bradley Smith authored Apr 12, 2021
  22c017f0
- [DAGCombiner] Fold step_vector with add/mul/shl · 7e1422c1
  Jun Ma authored Apr 08, 2021
  7e1422c1
- [RISCV] Pre-commit vector shuffle test cases · eae0ac3a
  Fraser Cormack authored Apr 14, 2021
  eae0ac3a
- [AArch64] Fix windows vararg functions with floats in the fixed args · 5144f730
  Martin Storsjö authored Apr 10, 2021
  5144f730
- [AMDGPU] Disable forceful inline of non-kernel functions which use LDS. · 4973b0c4
  hsmahesha authored Apr 15, 2021
  4973b0c4
- Reapply "[InferAttributes] Materialize all infered attributes for... · dd985551
  Philip Reames authored Apr 14, 2021
  dd985551
- Revert "Fix buildbots after 61a85da8 " · 98eea392
  Nico Weber authored Apr 14, 2021
  98eea392
- Fix buildbots after 61a85da8 · c609d533
  Philip Reames authored Apr 14, 2021
  
  c609d533
Apr 14, 2021
- [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u} · 6a18cc23
  Thomas Lively authored Apr 14, 2021
  6a18cc23
- [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u} · af7925b4
  Thomas Lively authored Apr 14, 2021
  af7925b4
- [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops · af7ab81c
  Thomas Lively authored Apr 14, 2021
  af7ab81c
- [X86] Add PR49028 test case · c4c9e4d6
  Simon Pilgrim authored Apr 14, 2021
  
  c4c9e4d6
- [AMDGPU] Rename "LDS lowering" pass name. · e3070db0
  hsmahesha authored Apr 14, 2021
  e3070db0
- [X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles. · 4fbe7615
  Simon Pilgrim authored Apr 14, 2021
  4fbe7615