Commits · e6c9a9af398baf40537d45498e0aaf417c1306dc · Roger Ferrer / llvm-epi · GitLab

Nov 11, 2019
- Use MCRegister in copyPhysReg · e6c9a9af
  Matt Arsenault authored Nov 11, 2019
  
  e6c9a9af
- [AArch64][SVE] Spilling/filling of SVE callee-saves. · 84a0c8e3
  Sander de Smalen authored Nov 05, 2019
  84a0c8e3
Nov 10, 2019
- [RISCV] Fix CFA when doing split sp adjustment with fp · 1c737f54
  Luís Marques authored Nov 10, 2019
  1c737f54
- [RISCV][NFC] Add CFI-related tests · be0fead7
  Luís Marques authored Nov 10, 2019
  be0fead7
- [X86] Handle MO_ConstantPoolIndex in X86AsmPrinter::PrintOperand · c2751737
  Craig Topper authored Nov 09, 2019
  c2751737
Nov 09, 2019
- Remove duplicate MemVT to fix shadow variable warning. NFCI. · dda80154
  Simon Pilgrim authored Nov 09, 2019
  
  dda80154
- Remove superfluous break after return. NFC. · a35a44fd
  Simon Pilgrim authored Nov 08, 2019
  
  a35a44fd
- Fix shadow variable warning by reducing scope of CC/InverseCC CondCodes. NFCI. · 59a14f9d
  Simon Pilgrim authored Nov 08, 2019
  
  59a14f9d
Nov 08, 2019
- [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (3) (baseline tests) · fe0763d2
  joanlluch authored Nov 08, 2019
  fe0763d2
- [AArch64][X86] Don't assume __powidf2 is available on Windows. · 5df3a872
  Eli Friedman authored Oct 31, 2019
  5df3a872
- [PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills · a3db9c08
  Yi-Hong Lyu authored Sep 12, 2019
  a3db9c08
- [XCOFF][AIX] Differentiate usage of label symbol and csect symbol · 0dc0572b
  Jason Liu authored Nov 08, 2019
  0dc0572b
- [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32 · e25bc5e0
  Dmitry Preobrazhensky authored Nov 08, 2019
  e25bc5e0
- Reland: [TII] Use optional destination and source pair as a return value; NFC · 8d2ccd1a
  Djordje Todorovic authored Nov 08, 2019
  8d2ccd1a
- [RAGreedy] Enable -consider-local-interval-cost for AArch64 · f649f24d
  Sanne Wouda authored Nov 08, 2019
  f649f24d
- [RISCV] Fix evaluation of %pcrel_lo · 41449c58
  Roger Ferrer authored Nov 08, 2019
  41449c58
- [BPF] turn on -mattr=+alu32 for cpu version v3 and later · 6b8baf30
  Yonghong Song authored Nov 07, 2019
  6b8baf30
- [PowerPC] Option for enabling absolute jumptables with command line · 9af28400
  Nemanja Ivanovic authored Nov 07, 2019
  9af28400
Nov 07, 2019
- X86FrameLowering - fix bool to unsigned cast static analyzer warnings. NFCI. · 05299c7d
  Simon Pilgrim authored Nov 07, 2019
  
  05299c7d
- ManagedStringPool - pre-increment iterator. NFC. · d5c4881a
  Simon Pilgrim authored Nov 07, 2019
  
  d5c4881a
- X86CondBrFolding - remove non-existent fixBranchProb function. NFC. · f0832406
  Simon Pilgrim authored Nov 07, 2019
  
  f0832406
- comment shiftamountthreshold · 0d3d3822
  joanlluch authored Nov 07, 2019
  
  0d3d3822
- [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section · bf996f76
  Simon Atanasyan authored Nov 05, 2019
  bf996f76
- [mips] Support `octeon+` CPU in the `.set arch=` directive · 3718102d
  Simon Atanasyan authored Nov 05, 2019
  3718102d
- [mips] Implement Octeon+ `saa` and `saad` instructions · 7bed381e
  Simon Atanasyan authored Nov 05, 2019
  7bed381e
- [AMDGPU] Fix bug introduced in 47a5c36b · 6e825104
  dfukalov authored Nov 06, 2019
  6e825104
- [X86] Remove unused variable. NFC · 17eb12fa
  Craig Topper authored Nov 06, 2019
  
  17eb12fa
- [X86] Remove dead code from combineStore. · 1c8460d6
  Craig Topper authored Nov 06, 2019
  1c8460d6
- [AArch64][SVE] Add remaining patterns and intrinsics for add/sub/mad patterns · e55b536d
  Danilo Carvalho Grael authored Nov 06, 2019
  e55b536d
- AMDGPU: Select global atomicrmw fadd · e16a7138
  Matt Arsenault authored Aug 29, 2019
  e16a7138
- [AMDGPU] Add handling of 160 bit registers in analyzeResourceUsage · d17bcf2b
  Stanislav Mekhanoshin authored Nov 06, 2019
  d17bcf2b
- When lowering calls and tail calls in AArch64, the register mask and · 8d694a45
  Eric Christopher authored Nov 06, 2019
  8d694a45
Nov 06, 2019
- [X86] Clamp large constant shift amounts for MMX shift intrinsics to 8-bits. · 641d2e52
  Craig Topper authored Nov 06, 2019
  641d2e52
- [AArch64] Re-add patterns for (s/u)mull2. · 35cf9a1f
  Eli Friedman authored Nov 04, 2019
  35cf9a1f
- [X86TargetTransformInfo] Fixed warning: Expression 'ISD == ISD::UREM' is always true. NFCI. · dad7a185
  Dávid Bolvanský authored Nov 06, 2019
  
  dad7a185
- [X86] Fix SLM v2i64 ADD/Sub/CMPEQ instruction schedules · 1786047b
  Simon Pilgrim authored Nov 06, 2019
  1786047b
- [X86] Fix SLM v2f64 ADD/MUL + FP BLEND/HADD instruction schedules · ad70d5f3
  Simon Pilgrim authored Nov 06, 2019
  ad70d5f3
- [X86ISelLowering] Fixed typo in assert. NFCI. · ca7f5bec
  Dávid Bolvanský authored Nov 06, 2019
  
  ca7f5bec
- [CostModel][X86] Improve add vXi64 + fadd vXf64 reduction tests for SLM · a091f706
  Simon Pilgrim authored Nov 06, 2019
  a091f706
- [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916) · 8e34dd94
  Sanjay Patel authored Nov 06, 2019
  8e34dd94