Commits · e89b60fcfc7ff776e93a94a54421850cc104a6df · Roger Ferrer / llvm-epi · GitLab

May 18, 2021
- Update MSVC version number in preprocessor check · e89b60fc
  Neal (nealsid) authored May 18, 2021
  e89b60fc
- [RISCV] Fix operand order in fixed-length VM(OR|AND)NOT patterns · 175bdf12
  Fraser Cormack authored May 17, 2021
  175bdf12
- [PowerPC] only check the load instruction result number 0. · 15d4ed6d
  Chen Zheng authored May 17, 2021
  15d4ed6d
- [AMDGPU] Do not check denorm for LDS FP atomic with unsafe flag · 45764efb
  Stanislav Mekhanoshin authored May 12, 2021
  45764efb
May 17, 2021
- [AArch64][SVE] Implement extractelement of i1 vectors. · 3dd49ec1
  Eli Friedman authored Sep 14, 2020
  3dd49ec1
- [WebAssembly] Nullify DBG_VALUE_LISTs in DebugValueManager · 6e1c1dac
  Heejin Ahn authored May 16, 2021
  6e1c1dac
- Revert "X86: support Swift Async context" · 6791a6b3
  Mitch Phillips authored May 17, 2021
  6791a6b3
- [AArch64] Support customizing stack protector guard · 0f417789
  Nick Desaulniers authored May 17, 2021
  0f417789
- [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX redux.sync instructions · f226e28a
  Steffen Larsen authored May 17, 2021
  f226e28a
- [Clang][NVPTX] Add NVPTX intrinsics and builtins for CUDA PTX cp.async instructions · 02c24688
  Stuart Adams authored May 17, 2021
  02c24688
- [AMDGPU] Set unused dst_sel to '?' in the encoding · f4c0fdc6
  Stanislav Mekhanoshin authored May 14, 2021
  f4c0fdc6
- [X86] Don't dereference a dyn_cast<> - use a cast<> instead. NFCI. · 41587466
  Simon Pilgrim authored May 17, 2021
  41587466
- [AMDGPU] Tweak VOP3_INTERP16 profile · 472f8567
  Jay Foad authored May 14, 2021
  472f8567
- [AArch64] Lower bitreverse in ISel · 50511df3
  Irina Dobrescu authored May 17, 2021
  50511df3
- [PowerPC] Add patterns for vselect of v1i128 · 511f4ae5
  Nemanja Ivanovic authored May 17, 2021
  511f4ae5
- [PowerPC] Do not emit dssall on AIX · 74ae7781
  Nemanja Ivanovic authored May 17, 2021
  74ae7781
- X86: support Swift Async context · 747e5cfb
  Tim Northover authored Jan 12, 2021
  747e5cfb
- AArch64: mark x22 livein if it's an async context that gets stored. · 769ced3d
  Tim Northover authored May 17, 2021
  769ced3d
- IR/AArch64/X86: add "swifttailcc" calling convention. · 82a0e808
  Tim Northover authored Nov 19, 2020
  82a0e808
- [AArch64] Lower fpto*i.sat intrinsics. · 900c8989
  Jacob Bramley authored Apr 27, 2021
  900c8989
- [RISCV] Optimize or/xor with immediate in the zbs extension · 7746e818
  Ben Shi authored May 17, 2021
  7746e818
May 16, 2021
- [RISCV] Replace AddiPair ComplexPattern with a PatLeaf. NFC · 0a34ff8b
  Craig Topper authored May 16, 2021
  0a34ff8b
- [BPF] add support for 32 bit registers in inline asm · 833e9b2e
  Alessandro Decina authored May 16, 2021
  833e9b2e
- [CPG][ARM] Optimize towards branch on zero in codegenprepare · dd5c5202
  David Green authored May 16, 2021
  dd5c5202
- [X86][SSE] Pull out combineToHorizontalAddSub helper from inside (F)ADD/SUB... · 262e4200
  Simon Pilgrim authored May 16, 2021
  262e4200
- [AIX][AsmPrinter] Print Global Variable in comments · 4b91f96a
  Jinsong Ji authored May 16, 2021
  4b91f96a
May 15, 2021
- Revert "[X86][SSE] Pull out combineToHorizontalAddSub helper from inside... · c012a388
  Nico Weber authored May 15, 2021
  c012a388
- [X86] X86OptimizeLEAPass::replaceDebugValue - take a copy of the DebugLoc not... · 8cb04d89
  Simon Pilgrim authored May 15, 2021
  8cb04d89
- [X86] X86CmovConverterPass::convertCmovInstsToBranches - take a copy of the... · 2ed89001
  Simon Pilgrim authored May 15, 2021
  2ed89001
- X86SpeculativeLoadHardeningPass::hardenValueInRegister - assert that we have a... · 73635adb
  Simon Pilgrim authored May 15, 2021
  73635adb
- [X86][Atom] Fix vector integer multiplication resource/throughputs · f9b12086
  Simon Pilgrim authored May 15, 2021
  f9b12086
- [X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies (REAPPLIED). NFCI. · 9ca2c50b
  Simon Pilgrim authored May 15, 2021
  9ca2c50b
- [AMDGPU] Update SCC defs to VCC when uses are changed to VCC · 3f7b7e73
  Brendon Cahoon authored May 08, 2021
  3f7b7e73
May 14, 2021
- Revert "[X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI." · 7aa89c4a
  Mitch Phillips authored May 14, 2021
  7aa89c4a
- [SystemZ] [z/OS] Add SystemZCallingConventionRegisters class · 8a7e2fb5
  Neumann Hon authored May 14, 2021
  8a7e2fb5
- [AMDGPU] Add support for architected flat scratch · 6fb02596
  Stanislav Mekhanoshin authored Apr 12, 2021
  6fb02596
- AMDGPU: Fix assert when rewriting saddr d16 loads · c7cff08f
  Matt Arsenault authored May 11, 2021
  c7cff08f
- [X86] AMD Zen 3: same-reg AVX YMM VPCMPGT{B,W,D,Q} is a zero-cycle(!) dep-breaking zero-idiom · 1fc1c887
  Roman Lebedev authored May 14, 2021
  1fc1c887
- [X86] AMD Zen 3: same-reg AVX XMM VPCMPGT{B,W,D,Q} is a zero-cycle(!) dep-breaking zero-idiom · 2f8572d8
  Roman Lebedev authored May 14, 2021
  2f8572d8
- [X86] AMD Zen 3: same-reg SSE XMM PCMPGT{B,W,D,Q} is a 1-cycle(!) dep-breaking zero-idiom · f8f7c765
  Roman Lebedev authored May 14, 2021
  f8f7c765