Commits · e918ba69582bd71ccf706b7c0f103c0b09043f94 · Roger Ferrer / llvm-epi · GitLab

Aug 17, 2021
- [LICM] Drop -licm-n2-threshold option · e918ba69
  Nikita Popov authored Aug 17, 2021
  e918ba69
- [llvm-readobj] Refactor ELFDumper::printAttributes() · 108ba4f4
  Jozef Lawrynowicz authored Aug 17, 2021
  108ba4f4
- [InstCombine] add tests for min/max with 'not' ops; NFC · ab8419a6
  Sanjay Patel authored Aug 17, 2021
  
  ab8419a6
- [AMDGPU] Fix lowering of AMDGPU::G_CTTZ_ZERO_UNDEF to AMDGPU::G_AMDGPU_FFBL_B32 · fb81271e
  Simon Pilgrim authored Aug 17, 2021
  fb81271e
- [VP] Add vector-predicated reduction intrinsics · f3e90472
  Fraser Cormack authored Jun 14, 2021
  f3e90472
- [SCEVExpander] Stop hoisting IR when reusing phis · 982da7a2
  Philip Reames authored Aug 17, 2021
  982da7a2
- Fix 2: [MCParser] Correctly handle CRLF line ends when consuming line comments · 6d5e31ba
  Tozer authored Aug 17, 2021
  6d5e31ba
- [llvm-objdump] -T: print symbol versions · c56b4cfd
  Fangrui Song authored Aug 17, 2021
  c56b4cfd
- [X86] Lower insertions into upper half of an 256-bit vector as broadcast+blend (PR50971) · 2078c4ec
  Roman Lebedev authored Aug 17, 2021
  2078c4ec
- Fix: [MCParser] Correctly handle CRLF line ends when consuming line comments · ad40cb88
  Tozer authored Aug 17, 2021
  ad40cb88
- [MCParser] Correctly handle CRLF line ends when consuming line comments · 5c6f748c
  Tozer authored Aug 17, 2021
  5c6f748c
- [SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute · ef198cd9
  Dylan Fleming authored Aug 17, 2021
  ef198cd9
- [ARM] Enable subreg liveness · 52e0cf9d
  David Green authored Aug 17, 2021
  52e0cf9d
- [InstCombine] fold signed min/max intrinsics with negated operands · d0975b7c
  Sanjay Patel authored Aug 17, 2021
  d0975b7c
- [InstCombine] add tests for smin/smax intrinsics with negated ops; NFC · 8fb269d9
  Sanjay Patel authored Aug 16, 2021
  
  8fb269d9
- [GlobalISel] Add combine for PTR_ADD with regbanks · fbae3463
  Sebastian Neubauer authored Aug 17, 2021
  fbae3463
- [CodeGenPrepare] The instruction to be sunk should be inserted before its user in a block · 9cfa9b44
  Tiehu Zhang authored Aug 17, 2021
  9cfa9b44
- [DebugInfo][InstrRef] Honour too-much-debug-info cutouts · 708cbda5
  Jeremy Morse authored Aug 17, 2021
  708cbda5
- [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG · 1f3e35b6
  Anton Afanasyev authored Aug 12, 2021
  1f3e35b6
- [Test][AggressiveInstCombine] Add test for shifts · 8f8f9260
  Anton Afanasyev authored Aug 12, 2021
  8f8f9260
- [hwasan] Prevent reordering of tag checks. · 0deedaa2
  Florian Mayer authored Aug 11, 2021
  0deedaa2
- [X86] [AMX] Replace bitcast with specific AMX intrinsics with X86 specific cast. · bcec4ccd
  Bing1 Yu authored Aug 05, 2021
  bcec4ccd
- [tests] precommit tests for D107692 · 9790a2a7
  Yunde Zhong authored Aug 17, 2021
  
  9790a2a7
- [LNICM] Fix infinite loop · a41c95c0
  Whitney Tsang authored Aug 17, 2021
  a41c95c0
- [AMDGPU] Skip pseudo MIs in hazard recognizer · 68660767
  Christudasan Devadasan authored Aug 12, 2021
  68660767
- [split-file] Default to --no-leading-lines · 54e76cb1
  Fangrui Song authored Aug 16, 2021
  54e76cb1
- [AMDGPU] Make BVH isel consistent with other MIMG opcodes · 99c790dc
  Carl Ritson authored Aug 17, 2021
  99c790dc
- [SamplePGO][NFC] Dump function profiles in order · f27fee62
  Hongtao Yu authored Aug 16, 2021
  f27fee62
Aug 16, 2021
- [ARM] Create MQQPR and MQQQQPR register classes · 9236dea2
  David Green authored Aug 16, 2021
  9236dea2
- [Remarks] Emit optimization remarks for atomics generating CAS loop · f22ba518
  Anshil Gandhi authored Aug 16, 2021
  f22ba518
- [ARM][TypePromotion] Re-generate test checks. NFC · 5bab1f09
  Craig Topper authored Aug 16, 2021
  5bab1f09
- Allow rematerialization of virtual reg uses · 877572cc
  Stanislav Mekhanoshin authored Aug 09, 2021
  877572cc
- Prevent machine licm if remattable with a vreg use · b9e433b0
  Stanislav Mekhanoshin authored Aug 09, 2021
  b9e433b0
- [MemorySSA] Remove -enable-mssa-loop-dependency option · 735a5904
  Nikita Popov authored Aug 14, 2021
  735a5904
- [MemorySSA] Remove unnecessary MSSA dependencies · 570c9beb
  Nikita Popov authored Aug 14, 2021
  570c9beb
- [X86] Add i128 funnel shift tests · 778440f1
  Simon Pilgrim authored Aug 16, 2021
  778440f1
- Fix whitespace typo in 94b4598d · f62d0d48
  Paul Robinson authored Aug 16, 2021
  
  f62d0d48
- [PS4] stp[n]cpy not available on PS4 · 94b4598d
  Paul Robinson authored Aug 16, 2021
  
  94b4598d
- [DAG] Fold concat_vectors(concat_vectors(x,y),concat_vectors(a,b)) -> concat_vectors(x,y,a,b) · d6fe8d37
  Simon Pilgrim authored Aug 16, 2021
  d6fe8d37
- Revert 54a61c94 and its follow up in 547b7125 · 95fe61e6
  Jeremy Morse authored Aug 16, 2021
  95fe61e6