- Jul 20, 2017
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Artem Belevich authored
The patch adds support of i128 params lowering. The changes are quite trivial to support i128 as a "special case" of integer type. With this patch, we lower i128 params the same way as aggregates of size 16 bytes: .param .b8 _ [16]. Currently, NVPTX can't deal with the 128 bit integers: * in some cases because of failed assertions like ValVTs.size() == OutVals.size() && "Bad return value decomposition" * in other cases emitting PTX with .i128 or .u128 types (which are not valid [1]) [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types Differential Revision: https://reviews.llvm.org/D34555 Patch by: Denys Zariaiev (denys.zariaiev@gmail.com) llvm-svn: 308675
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Matt Arsenault authored
Move the _RTN to the end of the name. It reads better if the other addressing mode components line up with the non-RTN version. It is also more convenient to define saddr variants of FLAT atomics to have the RTN last, and it is good to have a consistent naming scheme. llvm-svn: 308674
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Matt Arsenault authored
On AMDGPU SGPR spills are really spilled to another register. The spiller creates the spills to new frame index objects, which is used as a placeholder. This will eventually be replaced with a reference to a position in a VGPR to write to and the frame index deleted. It is most likely not a real stack location that can be shared with another stack object. This is a problem when StackSlotColoring decides it should combine a frame index used for a normal VGPR spill with a real stack location and a frame index used for an SGPR. Add an ID field so that StackSlotColoring has a way of knowing the different frame index types are incompatible. llvm-svn: 308673
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Zvi Rackover authored
llvm-svn: 308672
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Artem Belevich authored
llvm-svn: 308671
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Matt Morehouse authored
Summary: Implements https://github.com/google/sanitizers/issues/835. Flush stdout before exiting in test cases. Since the atexit hook is used for exit reports, pending prints to stdout can be lost if they aren't flushed before calling exit(). Expect tests to have non-zero exit code if exit() is called. Reviewers: vitalybuka, kcc Reviewed By: kcc Subscribers: eraman, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D35602 llvm-svn: 308669
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Davide Italiano authored
This fixes PR33791. llvm-svn: 308668
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Francis Visoiu Mistrih authored
llvm-svn: 308666
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Mandeep Singh Grang authored
Reviewers: compnerd, ruiu, rnk, zturner Reviewed By: rnk Subscribers: majnemer, aemerson, aprantl, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D35518 llvm-svn: 308665
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Francis Visoiu Mistrih authored
Split insertCSRSpillsAndRestores into insertCSRSaves + insertCSRRestores. This is mostly useful for future shrink-wrapping improvements where we want to save / restore a specific part of the CSRs in a specific block. Differential Revision: https://reviews.llvm.org/D35644 llvm-svn: 308664
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Kostya Serebryany authored
llvm-svn: 308663
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James Y Knight authored
Summary: Also enable no-fsmuld for sparcv7 (which doesn't have the instruction). The previous code which used a post-processing pass to do this was unnecessary; disabling the instruction is entirely sufficient. Reviewers: jacob_hansen, ekedaigle Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D35576 llvm-svn: 308661
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Krzysztof Parzyszek authored
This should eliminate most uses of countPopulation and Log2_32 on the lane mask values. llvm-svn: 308658
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Craig Topper authored
[X86] Allow masks with more than 6 bits set on the x << (y & mask) optimization for the 64-bit memory shifts. llvm-svn: 308657
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Craig Topper authored
[X86] Add test case to demonstrate that we don't allow masks wider than 6 bits in the (shift x, (and y, mask)) patterns for the 64-bit memory form. We allow wider than 5 bits in the 16 and 32 bit store forms. And we allow wider than 6 bits on the 64-bit regsiter form.:w I'm assuming this was a mistake made back in r148024. llvm-svn: 308656
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Krzysztof Parzyszek authored
llvm-svn: 308655
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Kostya Serebryany authored
llvm-svn: 308653
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Nirav Dave authored
llvm-svn: 308645
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Peter Collingbourne authored
Previously we were (mis)handling jump table members with a prevailing definition in a full LTO module and a non-prevailing definition in a ThinLTO module by dropping type metadata on those functions entirely, which would cause type tests involving such functions to fail. This patch causes us to drop metadata only if we are about to replace it with metadata from cfi.functions. We also want to replace metadata for available_externally functions, which can arise in the opposite scenario (prevailing ThinLTO definition, non-prevailing full LTO definition). The simplest way to handle that is to remove the definition; there's little value in keeping it around at this point (i.e. after most optimization passes have already run) and later code will try to use the function's linkage to create an alias, which would result in invalid IR if the function is available_externally. Fixes PR33832. Differential Revision: https://reviews.llvm.org/D35604 llvm-svn: 308642
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Matt Arsenault authored
llvm-svn: 308639
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Matt Arsenault authored
llvm-svn: 308638
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David Blaikie authored
llvm-svn: 308636
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Simon Pilgrim authored
revert: [llvm] r308609 - This patch added some test cases to demonsrate the issues described in Bug 33848 - X86 Asm does not support symbolic names inside address calculation. llvm-svn: 308622
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Nirav Dave authored
Summary: When pushing an extension of a constant bitwise operator on a load into the load, change other uses of the load value if they exist to prevent the old load from persisting. Reviewers: spatel, RKSimon, efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D35030 llvm-svn: 308618
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Nirav Dave authored
Summary: Add missing vector write of vector read reduction, i.e.: (insert_vector_elt x (extract_vector_elt x idx) idx) to x Reviewers: spatel, RKSimon, efriedma Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D35563 llvm-svn: 308617
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Daniel Sanders authored
llvm-svn: 308613
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Stefan Maksimovic authored
Builder clang-x86_64-linux-abi-test apparently failed due to a spurious error unrelated to the changes r308585 introduced. llvm-svn: 308612
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Simon Pilgrim authored
Test constant folding both on node creation (which already works) and once the input nodes have been folded themselves (not working yet). llvm-svn: 308611
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Andrew V. Tischenko authored
This patch added some test cases to demonsrate the issues described in Bug 33848 - X86 Asm does not support symbolic names inside address calculation. llvm-svn: 308609
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Javed Absar authored
Remove headers not required and convert to range-loop Reviewed by: @mcrosier Differential Revision: https://reviews.llvm.org/D35626 llvm-svn: 308607
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Simon Atanasyan authored
This patch adds handling of the `long_call`, `far`, and `near` attributes passed by front-end. The patch depends on D35479. Differential revision: https://reviews.llvm.org/D35480. llvm-svn: 308606
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Diana Picus authored
This reverts commit 36c6a2ea9669bc3bb695928529a85d12d1d3e3f9 because it broke the test-suite on the GlobalISel bot. llvm-svn: 308603
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Simon Pilgrim authored
Use predicate matchers introduced in D35492 to match more ISD::SRL constant folds llvm-svn: 308602
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Simon Pilgrim authored
llvm-svn: 308601
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Simon Pilgrim authored
Use predicate matchers introduced in D35492 to match more ISD::SRA constant folds llvm-svn: 308600
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Daniel Sanders authored
It seems that G++ 4.8 doesn't accept the 'enum A' in code of the form: enum A { ... }; const auto &F = []() -> enum A { ... }; However, it does accept: typedef enum { ... } A; const auto &F = []() -> A { ... }; llvm-svn: 308599
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Simon Pilgrim authored
Most combines currently recognise scalar and splat-vector constants, but not non-uniform vector constants. This patch introduces a matching mechanism that uses predicates to check against BUILD_VECTOR of ConstantSDNode, as well as scalar ConstantSDNode cases. I've changed a couple of predicates to demonstrate - the combine-shl changes add currently unsupported cases, while the MatchRotate replaces an existing mechanism. Differential Revision: https://reviews.llvm.org/D35492 llvm-svn: 308598
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Stefan Maksimovic authored
Builder clang-x86_64-linux-abi-test seems to fail after this change llvm-svn: 308597
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Daniel Sanders authored
Summary: This will allow us to merge the various sub-tables into a single table. This is a compile-time saving at this point. However, this will also enable the optimization of a table so that similar instructions can be tested together, reducing the time spent on the matching the code. The bulk of this patch is a mechanical conversion to the new MatchTable object which is responsible for tracking label definitions and filling in the index of the jump targets. It is also responsible for nicely formatting the table. This was necessary to support the new GIM_Try opcode which takes the index to jump to if the match should fail. This value is unknown during table construction and is filled in during emission. To support nesting try-blocks (although we currently don't emit tables with nested try-blocks), GIM_Reject has been re-introduced to explicitly exit a try-block or fail the overall match if there are no active try-blocks. Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar Reviewed By: rovka Subscribers: kristof.beyls, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D35117 llvm-svn: 308596
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Stefan Maksimovic authored
Introduced FSELECT node necesary when lowering ISD::SELECT which has i32, f64, f64 as its operands. SEL_D instruction required that its output and first operand of a SELECT node, which it used, have matching types. MTC1_D64 node introduced to aid FSELECT lowering. This fixes machine verifier errors on following tests: CodeGen/Mips/llvm-ir/select-dbl.ll CodeGen/Mips/llvm-ir/select-flt.ll CodeGen/Mips/select.ll Differential Revision: https://reviews.llvm.org/D35408 llvm-svn: 308595
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