Commits · eff53ce8fc06b2379114955d5a2f77c24f483d1a · Roger Ferrer / llvm-epi · GitLab

Jul 31, 2023
- [RISCV] Remove unused CHECK prefix from test. NFC · eff53ce8
  Craig Topper authored Jul 30, 2023
  
  eff53ce8
- [CSKY] Add more IR patterns to select FNMUL · 14e0a67a
  Ben Shi authored Jul 13, 2023
  14e0a67a
- [RISCV] Use x0 in vsetvli when avl is equal to vlmax. · b7408ebb
  Jianjian GUAN authored Jul 27, 2023
  b7408ebb
Jul 30, 2023
- [InstCombine] Process blocks in RPO · ad7f0201
  Nikita Popov authored Jan 13, 2023
  ad7f0201
- [AArch64] Add a fminnum/fmaxnum test. NFC · cf39dea5
  David Green authored Jul 30, 2023
  cf39dea5
- [AArch64] Regenerate arm64-vabs.ll, arm64-subvector-extend.ll and some mir tests. NFC · 76f0d186
  David Green authored Jul 30, 2023
  
  76f0d186
- [LV] Regenerate check lines for shrinking tests. · 4162f36b
  Florian Hahn authored Jul 30, 2023
  4162f36b
- [Hexagon] Add machine verification to some tests · 58642565
  Jay Foad authored Jul 30, 2023
  58642565
- [SimplifyCFG] Regenerate test checks (NFC) · 6d55f6d8
  DianQK authored Jul 30, 2023
  6d55f6d8
- [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator · 236e6787
  Aleksandr Popov authored Jul 30, 2023
  236e6787
Jul 29, 2023
- Revert "[MachineScheduler] Track physical register dependencies per-regunit" · e2e3f068
  Jay Foad authored Jul 29, 2023
  e2e3f068
- [InstCombineVectorOps] Use poison instead of undef as placeholder [NFC] · eb1617a5
  Nuno Lopes authored Jul 29, 2023
  eb1617a5
- [MachineScheduler] Track physical register dependencies per-regunit · 1a54671d
  Jay Foad authored Jul 28, 2023
  1a54671d
- [MachineScheduler] Test case for physical register dependencies · 5a64c89c
  Jay Foad authored Jul 28, 2023
  5a64c89c
- [AArch64] Refactor checks in sign-return-address.ll test · 4210204f
  Anatoly Trosinenko authored Jul 29, 2023
  4210204f
- [PatternMatch] Do not match constant expressions for binops · ed23609b
  Nikita Popov authored Jul 29, 2023
  ed23609b
- [XCOFF] Do not put MergeableCStrings in their own section · 9d4e8c09
  Wael Yehia authored Jul 26, 2023
  9d4e8c09
Jul 28, 2023
- [test] [MCJIT] Don't overwrite config.unsupported to False · ca18b4a0
  Martin Storsjö authored May 05, 2023
  ca18b4a0
- [AArch64] Change the cost of vector insert/extract to 2 · 2a859b20
  David Green authored Jul 28, 2023
  2a859b20
- AMDGPU/GlobalISel: Set dead on scc on manually selected instructions · 3240ae70
  Matt Arsenault authored Jul 28, 2023
  3240ae70
- [HACK] X86: Disable isCopyInstrImpl for undef subregister defs · c26dfc81
  Matt Arsenault authored Jul 28, 2023
  c26dfc81
- [PEI] Don't zero out noreg operands · f800c1f3
  Arthur Eubanks authored Jul 27, 2023
  f800c1f3
- [AMDGPU] Allow 8,16 bit sources in calculateSrcByte · 391249d1
  Jeffrey Byrnes authored Jun 29, 2023
  391249d1
- [PEI][ARM] Switch to backwards frame index elimination · 94512338
  Jay Foad authored Jun 08, 2023
  94512338
- [DAGCombine] Support truncated constants for fptosi.sat combining · c13e310f
  Evgenii Kudriashov authored Jul 28, 2023
  c13e310f
- [RISCV] A test for conditional binary ops. · cb15e657
  Mikhail Gudim authored Jul 17, 2023
  cb15e657
- [ThinLTO] Use module hash instead of module ID for cache key · 279c2971
  Nikita Popov authored Jul 28, 2023
  279c2971
- [RISCV] Add support for XCVbi extension in CV32E40P · afb9c04a
  melonedo authored Jul 28, 2023
  afb9c04a
- [llvm-nm][RISCV] Recognize mapping symbols · 1f12f6ff
  Job Noorman authored Jul 28, 2023
  1f12f6ff
- Revert "[llvm-profdata] Refactoring Sample Profile Reader to increase FDO... · 1a53b5c3
  Aaron Ballman authored Jul 28, 2023
  1a53b5c3
- [CSKY] Optimize conditional branches with float comparison · 7ca6b769
  Ben Shi authored Jul 17, 2023
  7ca6b769
- [PhaseOrdering] Add test for GVN/hoist order (NFC) · bbe2887f
  Nikita Popov authored Jul 28, 2023
  bbe2887f
- [MergedLoadStoreMotion] Regenerate test checks (NFC) · 3984a3dd
  Nikita Popov authored Jul 28, 2023
  
  3984a3dd
- [Object] Use COFF archive format for import libraries. · bacc7aeb
  Jacek Caban authored Jul 27, 2023
  bacc7aeb
- Revert "[RISCV] Add support for XCVbi extension in CV32E40P" · e4777dc4
  melonedo authored Jul 28, 2023
  e4777dc4
- [AArch64] Add funnel shift lowering for SelectionDAG · 8eeabf67
  Tuan Chuong Goh authored Jul 28, 2023
  8eeabf67
- Revert "[RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF" · d5f496a2
  Kevin Athey authored Jul 28, 2023
  d5f496a2
- [ARM] Correctly handle combining segmented stacks with execute-only · 8336d38b
  John Brawn authored Jul 25, 2023
  8336d38b
- [RISCV] Add support for XCVbi extension in CV32E40P · bf2ad26b
  melonedo authored Jun 25, 2023
  bf2ad26b
- [JITLink][RISCV] Fix tests after D154958 · ec4d0616
  Job Noorman authored Jul 28, 2023
  
  ec4d0616