Commits · f208c659fb76b1ad8ae83dd10c4f0c30986d48ee · Roger Ferrer / llvm-epi · GitLab

Aug 03, 2020
- [X86] Make ENDBR instruction a scheduling boundary · f208c659
  Joao Moreira authored Aug 03, 2020
  f208c659
- [X86][SSE] Shuffle combine blends to OR(X,Y) if the relevant elements are known zero. · 219f32f4
  Simon Pilgrim authored Aug 03, 2020
  219f32f4
- [NewPM][LoopVersioning] Port LoopVersioning to NPM · 7c19c89d
  Arthur Eubanks authored Jul 31, 2020
  7c19c89d
- [X86] Use h-register for final XOR of __builtin_parity on 64-bit targets. · ac82b918
  Craig Topper authored Aug 03, 2020
  ac82b918
- [llvm] Add a parser from JSON to TensorSpec · 4b1b109c
  Mircea Trofin authored Jul 30, 2020
  4b1b109c
- [MSAN] Instrument freeze instruction by clearing shadow · 3ebd1ba6
  Gui Andrade authored Jul 31, 2020
  3ebd1ba6
- [SCEV] If Start>=RHS, simplify (Start smin RHS) = RHS for trip counts. · ee1c1270
  Florian Hahn authored Aug 03, 2020
  ee1c1270
- [FPEnv] Don't transform FSUB(-0,X)->FNEG(X) in SelectionDAGBuilder. · 31c7a2fd
  Cameron McInally authored Aug 03, 2020
  31c7a2fd
- [DWARFYAML] Implement the .debug_loclists section. · 08649d43
  Xing GUO authored Aug 03, 2020
  08649d43
- [NFC][APInt][DenseMapInfo] Move DenseMapAPIntKeyInfo into DenseMap.h as DenseMapInfo<APInt> · 1c2777f5
  Shinji Okumura authored Aug 03, 2020
  1c2777f5
- [InstCombine] reduce xor-of-or's bitwise logic (PR46955); 2nd try · 23693ffc
  Sanjay Patel authored Aug 03, 2020
  23693ffc
- [DWARFYAML] Offsets should be omitted when the OffsetEntryCount is 0. · 2d8ca4ae
  Xing GUO authored Aug 03, 2020
  2d8ca4ae
- GlobalISel: Handle arbitrary FewerElementsVector for G_IMPLICIT_DEF · 42a9f6c5
  Matt Arsenault authored Jul 28, 2020
  
  42a9f6c5
- AMDGPU/GlobalISel: Remove old hacks for boolean selection · 2414bab5
  Matt Arsenault authored Jul 26, 2020
  2414bab5
- GlobalISel: Reimplement moreElementsVectorDst · 1782fbbc
  Matt Arsenault authored Feb 02, 2020
  1782fbbc
- Revert "[InstCombine] reduce xor-of-or's bitwise logic (PR46955)" · f19a9be3
  Sanjay Patel authored Aug 03, 2020
  f19a9be3
- AMDGPU/GlobalISel: Apply load bitcast to s.buffer.load intrinsic · fd63e469
  Matt Arsenault authored Jun 16, 2020
  fd63e469
- [X86][SSE] Start shuffle combining from ANY_EXTEND_VECTOR_INREG on SSE targets · 99a971ca
  Simon Pilgrim authored Aug 03, 2020
  99a971ca
- AMDGPU/GlobalISel: Fix selecting broken copies for s32->s64 anyext · d8ef1d12
  Matt Arsenault authored Jul 22, 2020
  d8ef1d12
- [InstCombine] reduce xor-of-or's bitwise logic (PR46955) · 2265d01f
  Sanjay Patel authored Aug 03, 2020
  2265d01f
- [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz · 18279a54
  Nicholas Guy authored Jul 01, 2020
  18279a54
- [LV] Do not check widening decision for instrs outside of loop. · 98db2771
  Florian Hahn authored Aug 03, 2020
  98db2771
- [MachOYAML] Remove redundant variable initialization. NFC. · ef005f20
  Xing GUO authored Aug 03, 2020
  ef005f20
- [Attributor] Check nonnull attribute violation in AAUndefinedBehavior · 434cf2de
  Shinji Okumura authored Aug 03, 2020
  434cf2de
- [DebugInfo] Make DIEDelta::SizeOf() more explicit. NFCI. · 414b9bec
  Igor Kudrin authored Aug 03, 2020
  414b9bec
- [DebugInfo] Fix misleading using of DWARF forms with DIELabel. NFCI. · f98e03a3
  Igor Kudrin authored Aug 03, 2020
  f98e03a3
- [DebugInfo] Fix a comment and a variable name. NFC. · 8feff8d1
  Igor Kudrin authored Aug 03, 2020
  8feff8d1
- [DebugInfo] Make DIELocList::SizeOf() more explicit. NFCI. · 4e10a189
  Igor Kudrin authored Aug 03, 2020
  4e10a189
- [MC] Default MCAsmBackend::mayNeedRelaxation() to false · 40da58a0
  Fangrui Song authored Aug 02, 2020
  
  40da58a0
- [NFC][PowerPC] Add a multiclass for fsetcc to define them in a uniform way · 62e46446
  QingShan Zhang authored Aug 03, 2020
  62e46446
- [RISCV] eliminate the repetition declare of SDLoc DL · a96921af
  StephenFan authored Jul 31, 2020
  a96921af
- Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets · b497665d
  Fangrui Song authored Aug 02, 2020
  b497665d
Aug 02, 2020
- Recommit "[IPConstProp] Remove and move tests to SCCP." · 599955eb
  Florian Hahn authored Aug 02, 2020
  599955eb
- [StackSafety, NFC] Don't insert empty objects into the map · 08cf4965
  Vitaly Buka authored Aug 02, 2020
  08cf4965
- [X86] Use parity flag from byte test/cmp instruction for __builtin_parity when... · 64516ec7
  Craig Topper authored Aug 02, 2020
  64516ec7
- [IR] Add IRBuilderBase::CreateVectorSplat(ElementCount EC) variant · e2022367
  Simon Pilgrim authored Aug 02, 2020
  e2022367
- [InstSimplify] fold max (max X, Y), X --> max X, Y · 4abc69c6
  Sanjay Patel authored Aug 02, 2020
  4abc69c6
- GlobalISel: Implement bitcast action for G_EXTRACT_VECTOR_ELEMENT · 212570ab
  Matt Arsenault authored Jun 15, 2020
  212570ab
- X86InstrInfo.cpp - fix include ordering. NFCI. · 00d0f354
  Simon Pilgrim authored Aug 02, 2020
  
  00d0f354
- Use merge null and isa<> tests into isa_and_nonnull<>. NFCI. · 7dd4f035
  Simon Pilgrim authored Aug 02, 2020
  
  7dd4f035