Commits · f4e3f3e31cacd412bcef0906da3c6a4bd503d0a2 · Roger Ferrer / llvm-epi · GitLab

Feb 07, 2018
- Revert "AMDGPU: Add 32-bit constant address space" · f4e3f3e3
  Rafael Espindola authored Feb 07, 2018
  f4e3f3e3
- AMDGPU: Add 32-bit constant address space · 871c30e5
  Marek Olsak authored Feb 07, 2018
  871c30e5
- AMDGPU: Remove the s_buffer workaround for GFX9 chips · b2cc7798
  Marek Olsak authored Feb 07, 2018
  b2cc7798
- [X86][AVX] Add PACKSSDW/PACKUSDW support for truncation of clamped values · b4e789e8
  Simon Pilgrim authored Feb 07, 2018
  b4e789e8
- [mips] Support 'y' operand code to print exact log2 of the operand · 70498f81
  Simon Atanasyan authored Feb 07, 2018
  70498f81
- [mips] Handle 'M' and 'L' operand codes for memory operands · 737bec38
  Simon Atanasyan authored Feb 07, 2018
  737bec38
- [ARM] FP16 mov imm pattern · 8c073934
  Sjoerd Meijer authored Feb 07, 2018
  8c073934
- [x86/retpoline] Make the external thunk names exactly match the names · 282ae163
  Chandler Carruth authored Feb 07, 2018
  282ae163
- AMDGPU/GlobalISel: Mark 32-bit G_FPTOUI as legal · 33445765
  Tom Stellard authored Feb 07, 2018
  33445765
- [AMDGPU] Suppress redundant waitcnt instrs. · 24c92eeb
  Mark Searles authored Feb 07, 2018
  24c92eeb
- AMDGPU: Select BFI patterns with 64-bit ints · a18b3bcf
  Matt Arsenault authored Feb 07, 2018
  a18b3bcf
- [DAGCombiner][AMDGPU][X86] Turn cttz/ctlz into cttz_zero_undef/ctlz_zero_undef... · 58ecffd8
  Craig Topper authored Feb 06, 2018
  58ecffd8
- Place undefined globals in .bss instead of .data · cd07a3e2
  Eli Friedman authored Feb 06, 2018
  cd07a3e2
Feb 06, 2018
- [AArch64] Adjust the cost model for Exynos M3 · cb7959fd
  Evandro Menezes authored Feb 06, 2018
  cb7959fd
- [Hexagon] Extract HVX lowering and selection into HVX-specific files, NFC · 8abaf895
  Krzysztof Parzyszek authored Feb 06, 2018
  8abaf895
- [Hexagon] Lower concat of more than 2 vectors into build_vector · 97a5095d
  Krzysztof Parzyszek authored Feb 06, 2018
  97a5095d
- [AMDGPU] removed dead code handling rmw in memory legalizer · ce2d428a
  Stanislav Mekhanoshin authored Feb 06, 2018
  ce2d428a
- [Hexagon] Don't form new-value jumps from floating-point instructions · be253e79
  Krzysztof Parzyszek authored Feb 06, 2018
  be253e79
- [ARM] f16 conversions · d2718ba9
  Sjoerd Meijer authored Feb 06, 2018
  d2718ba9
- [DAG, X86] Improve Dependency analysis when doing multi-node · 27721e86
  Nirav Dave authored Feb 06, 2018
  27721e86
- AMDGPU: Fix S_BUFFER_LOAD_DWORD_SGPR moveToVALU · 7d92b7e2
  Marek Olsak authored Feb 06, 2018
  7d92b7e2
- [Hexagon] Remove leftover assert · 1d52a850
  Krzysztof Parzyszek authored Feb 06, 2018
  1d52a850
- [Hexagon] Split HVX operations on vector pairs · 88f11003
  Krzysztof Parzyszek authored Feb 06, 2018
  88f11003
- [Hexagon] Add helper functions to identify single/pair vector types, NFC · 7b52cf1d
  Krzysztof Parzyszek authored Feb 06, 2018
  7b52cf1d
- [Hexagon] Handle lowering of SETCC via setCondCodeAction · 69f1d7e3
  Krzysztof Parzyszek authored Feb 06, 2018
  69f1d7e3
- [X86][SSE] Add PACKUS support for truncation of clamped values · ae00a71f
  Simon Pilgrim authored Feb 06, 2018
  ae00a71f
- [AMDGPU] do not generate .AMDGPU.config for amdpal os type · 807ecc3d
  Tim Renouf authored Feb 06, 2018
  807ecc3d
- [AArch64][SVE] Asm: Add AND_ZI instructions and aliases · 81fcf865
  Sander de Smalen authored Feb 06, 2018
  81fcf865
- [X86][SSE] Add PACKSS support for truncation of clamped values · 90a237bf
  Simon Pilgrim authored Feb 06, 2018
  90a237bf
- [PowerPC] fix up in rL324229, NFC · ad48d2fe
  Hiroshi Inoue authored Feb 06, 2018
  ad48d2fe
- [AArch64] Fix spelling of ICH_ELRSR_EL2 system register · 6df8f43c
  Oliver Stannard authored Feb 06, 2018
  6df8f43c
- [ARM][AArch64] Add CSDB speculation barrier instruction · ee0ac393
  Oliver Stannard authored Feb 06, 2018
  ee0ac393
- [ARM] Armv8.2-A FP16 code generation (part 3/3) · 89ea2648
  Sjoerd Meijer authored Feb 06, 2018
  89ea2648
- AMDGPU/MemoryModel: Fix monotonic atomic loads · 8818d13e
  Konstantin Zhuravlyov authored Feb 06, 2018
  8818d13e
- [RISCV] Add support for %pcrel_lo. · 646ab87b
  Ahmed Charles authored Feb 06, 2018
  646ab87b
- Revert "Don't assume a null GV is local for ELF and MachO." · 697d1bc2
  Reid Kleckner authored Feb 06, 2018
  697d1bc2
- [X86] Relax restrictions on what setcc condition codes can be folded with a... · 9c6c7c5e
  Craig Topper authored Feb 05, 2018
  9c6c7c5e
- [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681) · d7c702b4
  Sanjay Patel authored Feb 05, 2018
  d7c702b4
Feb 05, 2018
- [X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests · eedb6632
  Nirav Dave authored Feb 05, 2018
  eedb6632
- [X86] Artificially lower the complexity of the scalar ANDN patterns so that... · 9a06f247
  Craig Topper authored Feb 05, 2018
  9a06f247