Commits · f53d60e1752be6b97deac9d9ead09847db38e38f · Roger Ferrer / llvm-epi · GitLab

Oct 01, 2022
- [ARM] Support all versions of AND, ORR, EOR and BIC in optimizeCompareInstr · 945a1468
  Filipp Zhinkin authored Aug 12, 2022
  945a1468
Sep 26, 2022
- [ARM] Enable and/cmp0 folding · 66021101
  Momchil Velikov authored Sep 26, 2022
  66021101
Sep 16, 2022
- [MachinePipeliner] Fix the interpretation of the scheduling model · 116838b1
  Yuta Mukai authored Sep 16, 2022
  116838b1
Sep 12, 2022
- RegAllocGreedy: Try local instruction splitting with subranges · e3027116
  Matt Arsenault authored Jul 24, 2022
  e3027116
Aug 22, 2022
- [ModuloSchedule] Add interface call to accept/reject SMS schedules · ced705c4
  David Penry authored Jun 30, 2022
  ced705c4
Aug 17, 2022
- Revert "[ModuloSchedule] Add interface call to accept/reject SMS schedules" · 1c9f0408
  David Penry authored Aug 17, 2022
  1c9f0408
- [ModuloSchedule] Add interface call to accept/reject SMS schedules · 8c4aea43
  David Penry authored Jun 30, 2022
  8c4aea43
Aug 08, 2022
- [DAG] FoldConstantArithmetic - add initial support for undef elements in... · e5e93b61
  Simon Pilgrim authored Aug 08, 2022
  e5e93b61
Jul 31, 2022
- [InstSimplify] fold FP rounding intrinsic with rounded operand · 02b3a358
  Sanjay Patel authored Jul 30, 2022
  02b3a358
Jul 27, 2022
- [DAG] SimplifyDemandedBits - don't early-out for multiple use values · 529bd4f3
  Simon Pilgrim authored Jul 27, 2022
  529bd4f3
Jul 20, 2022
- [ARM] Fix Thumb2 compare being emitted ExpandCMP_SWAP · 4704da13
  David Green authored Jul 20, 2022
  4704da13
Jul 19, 2022
- [DAG] Call SimplifyDemandedBits from ISD::MUL nodes · 71c502cb
  Simon Pilgrim authored Jul 19, 2022
  71c502cb
- [ARM] Remove VBICimm if no cleared bits are demanded · 6cb95290
  David Green authored Jul 19, 2022
  6cb95290
Jul 17, 2022
- [ARM] Guard VMOVH and VINS patterns. · cb806ce2
  David Green authored Jul 17, 2022
  cb806ce2
Jul 15, 2022
- [SelectionDAG][RISCV][AMDGPU][ARM] Improve SimplifyDemandedBits for SHL with variable shift amount. · dcfc1fd2
  Craig Topper authored Jul 14, 2022
  dcfc1fd2
Jul 13, 2022
- [ARM] Fix subtarget features for Thumb2 tests. NFC · 6c46b3d6
  David Green authored Jul 13, 2022
  6c46b3d6
Jul 11, 2022
- [MVE] Don't distribute add of vecreduce if it has more than one use · ddd94851
  John Brawn authored Jul 08, 2022
  ddd94851
- [ARM] Expand MVE i1 fptoint and inttofp if mve.fp is not present. · 0a11ad2a
  David Green authored Jul 11, 2022
  0a11ad2a
Jul 10, 2022
- [InterleaveAccessPass] Handle multi-use binop shuffles · 28b41237
  David Green authored Jul 10, 2022
  28b41237
Jul 09, 2022
- [ARM][AArch64] Add additional test for multiuse vldn binop shuffles. NFC · 6ce63e26
  David Green authored Jul 09, 2022
  6ce63e26
Jul 05, 2022
- [Thumb2] Remove unneeded IR from MIR test (NFC) · 07b185ed
  Nikita Popov authored Jul 05, 2022
  07b185ed
Jun 22, 2022
- [ARM] Fix MVE gather/scatter merged gep offsets · 979400be
  David Green authored Jun 22, 2022
  979400be
Jun 20, 2022
- [ARM] Allow distributing postinc with PHI uses · 76f60931
  David Green authored Jun 20, 2022
  76f60931
Jun 19, 2022
- [MachinePipeliner] Handle failing constrainRegClass · e995e344
  David Green authored Jun 19, 2022
  e995e344
- [DAG] SimplifyDemandedBits - add ISD::VSELECT handling · db1be696
  Simon Pilgrim authored Jun 19, 2022
  
  db1be696
Jun 16, 2022
- Revert "[ARM] Add a pipeline test showing missing postinc generation. NFC" · c5990d35
  David Green authored Jun 16, 2022
  c5990d35
- [ARM] Add a pipeline test showing missing postinc generation. NFC · d9ef307e
  David Green authored Jun 16, 2022
  
  d9ef307e
Jun 14, 2022
- [ARM] Add more opaque pointer gather/scatter tests. NFC · 1da69402
  David Green authored Jun 14, 2022
  1da69402
Jun 11, 2022
- [DAG] visitINSERT_VECTOR_ELT - fold insert_vector_elt(scalar_to_vector(x),v,i) -> build_vector() · a71ad6a3
  Simon Pilgrim authored Jun 11, 2022
  a71ad6a3
Jun 10, 2022
- [MVE] Fold fadd(select(..., +0.0)) into a predicated fadd · 007917b9
  David Sherwood authored Jun 08, 2022
  007917b9
Jun 08, 2022
- [SelectionDAG] Teach computeKnownBits that a nsw self multiply produce a positive value. · 4bcfc418
  Craig Topper authored Jun 08, 2022
  4bcfc418
Jun 02, 2022
- [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. · a92ed167
  Hendrik Greving authored Jun 02, 2022
  a92ed167
Jun 01, 2022
- Revert "[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4." · e9d05cc7
  Hendrik Greving authored Jun 01, 2022
  e9d05cc7
- [ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4. · 430ac5c3
  Hendrik Greving authored May 06, 2022
  430ac5c3
- [ARM][Thumb2] Refresh UXTB16 tests to match optimized IR from instcombine · e1d02f6c
  Simon Pilgrim authored Jun 01, 2022
  e1d02f6c
May 26, 2022
- [ARM] Recognize t2LoopEnd for software pipelining · 917dc074
  David Penry authored Mar 28, 2022
  917dc074
May 25, 2022
- [ARM] Fix vcvtb/t.f16 input liveness · 18cb3b35
  David Green authored May 25, 2022
  18cb3b35
May 18, 2022
- [ARM] Clean up a test check from D125604. NFC · fc0229fd
  David Green authored May 18, 2022
  fc0229fd
May 14, 2022
- [DAG] Enable ISD::SHL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits · 1ecc3d86
  Simon Pilgrim authored May 14, 2022
  1ecc3d86
May 10, 2022
- Update test for changes in f0ea9c9c / D124552 · 3bf643eb
  Matthias Braun authored May 10, 2022
  
  3bf643eb