Commits · f956840dbe41f3121ecceea24e0f1aa15cb0f5bb · Roger Ferrer / llvm-epi · GitLab

Oct 07, 2018
- [x86] add vector fadd with undef elts test; NFC · f956840d
  Sanjay Patel authored Oct 07, 2018
  f956840d
- [x86] remove redundant tests; NFC · 6c02c6a3
  Sanjay Patel authored Oct 07, 2018
  6c02c6a3
- [DAGCombiner] allow undefs when matching vector splats for fmul folds · ef76e279
  Sanjay Patel authored Oct 07, 2018
  ef76e279
- [x86] add vector fmul with undef elts tests; NFC · fcb1061c
  Sanjay Patel authored Oct 07, 2018
  fcb1061c
- [DAGCombiner] allow undef elts in vector fabs/fneg matching · 0b74c840
  Sanjay Patel authored Oct 07, 2018
  0b74c840
- [DAGCombiner] shorten code for bitcast+fabs fold; NFC · 46a9dc2e
  Sanjay Patel authored Oct 07, 2018
  46a9dc2e
- [x86] add tests for FP logic folding for vectors with undefs; NFC · 31a3f2aa
  Sanjay Patel authored Oct 07, 2018
  31a3f2aa
- [clangd] NFC: Migrate to LLVM STLExtras API where possible · 4a5ff88f
  Kirill Bobyrev authored Oct 07, 2018
  4a5ff88f
- [InstSimplify] add vector test for fneg+fdiv; NFC · 01daf62a
  Sanjay Patel authored Oct 07, 2018
  01daf62a
- [SelectionDAG] Respect multiple uses in SimplifyDemandedBits to... · 3b04a4e3
  Simon Pilgrim authored Oct 07, 2018
  3b04a4e3
- [AARCH64][X86] Remove _nonsplat from test names · 012fda59
  Simon Pilgrim authored Oct 07, 2018
  012fda59
- [LegalizeVectorOps] Make ExpandStrictFPOp return the result corresponding to... · e4d199e3
  Craig Topper authored Oct 07, 2018
  e4d199e3
- [IAI,LV] Avoid creating interleave-groups for predicated accesse · 72f6e299
  Dorit Nuzman authored Oct 07, 2018
  72f6e299
- [RISCV] Introduce alu8.ll and alu16.ll tests · 47afe5e7
  Alex Bradbury authored Oct 07, 2018
  47afe5e7
- [ORC] Consume unhandled errors in unit test. · cd0e5990
  Lang Hames authored Oct 07, 2018
  cd0e5990
- [ORC] Add a 'remove' method to JITDylib to remove symbols. · 535448e0
  Lang Hames authored Oct 06, 2018
  535448e0
- [ORC] Pass symbol name to discard by const reference. · cb5702c3
  Lang Hames authored Oct 06, 2018
  cb5702c3
- [X86] getFauxShuffleMask - Handle undef + sentinel values in subvector insertion · 9fa1c664
  Simon Pilgrim authored Oct 06, 2018
  9fa1c664
Oct 06, 2018
- [X86][SSE] Add SSE41 vector int2fp tests · 0dcf1cea
  Simon Pilgrim authored Oct 06, 2018
  0dcf1cea
- [X86][AVX] Ensure resolveTargetShuffleInputs shuffle masks are the correct width · a30e8d23
  Simon Pilgrim authored Oct 06, 2018
  a30e8d23
- Papers and Issues for San Diego · b9f72a5a
  Marshall Clow authored Oct 06, 2018
  b9f72a5a
- [X86] combinePMULDQ - add op back to worklist if SimplifyDemandedBits succeeds on either operand · 62d199f4
  Simon Pilgrim authored Oct 06, 2018
  62d199f4
- [X86] Regenerate LSR loop iteration test · 944c5305
  Simon Pilgrim authored Oct 06, 2018
  944c5305
- [x86] add test for masked store with extra shift op; NFC · 891be5af
  Sanjay Patel authored Oct 06, 2018
  891be5af
- [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simplify PSHUFB masks · 0cc0a24b
  Simon Pilgrim authored Oct 06, 2018
  0cc0a24b
- [X86] Use the SimplifyDemandedBits wrappers where possible. NFCI. · ae78d709
  Simon Pilgrim authored Oct 06, 2018
  ae78d709
- Revert rL343916: Fix -Wmissing-braces warning. NFCI. · b616b809
  Simon Pilgrim authored Oct 06, 2018
  b616b809
- Fix -Wmissing-braces warning. NFCI. · 2a6bfa0c
  Simon Pilgrim authored Oct 06, 2018
  2a6bfa0c
- Wdocumentation fix · 96742556
  Simon Pilgrim authored Oct 06, 2018
  96742556
- Wdocumentation fix · 3773dc37
  Simon Pilgrim authored Oct 06, 2018
  3773dc37
- [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification · 9c9c97bc
  Simon Pilgrim authored Oct 06, 2018
  9c9c97bc
- [clangd] Remove unused headers from CodeComplete.cpp · 39f7b396
  Fangrui Song authored Oct 06, 2018
  39f7b396
- [RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6 · 639df9e4
  Alex Bradbury authored Oct 06, 2018
  639df9e4
- AMDGPU: Consolidate SMRD TableGen patterns · 251ee083
  Tom Stellard authored Oct 06, 2018
  251ee083
- Thread safety analysis: Handle conditional expression in getTrylockCallExpr · b0a2a0cf
  Aaron Puchert authored Oct 06, 2018
  b0a2a0cf
- [llvm-ar] Use POSIX-specified timestamps for 'tv'. · 34c0e470
  Jordan Rupprecht authored Oct 05, 2018
  34c0e470
- Add support for artificial tail call frames · 4b36f791
  Vedant Kumar authored Oct 05, 2018
  4b36f791
- Relax a data formatter test · 9d9c9655
  Vedant Kumar authored Oct 05, 2018
  9d9c9655
- [New PM][PassTiming] implement -time-passes for the new pass manager · 884e52a7
  Fedor Sergeev authored Oct 05, 2018
  884e52a7
- [AArch64] -mcpu=native CPU detection for Cavium processors · 0a6c000c
  Joel Jones authored Oct 05, 2018
  0a6c000c