Commits · fc13bdd2db3035fc3693fec6aa086db4d1db3e4c · Roger Ferrer / llvm-epi · GitLab

Nov 29, 2016
- AMDGPU: Disallow exec as SMEM instruction operand · 640c44b8
  Matt Arsenault authored Nov 29, 2016
  640c44b8
- AMDGPU: Use SGPR_64 for argument lowerings · cdad316c
  Matt Arsenault authored Nov 29, 2016
  cdad316c
- AMDGPU: Rename flat operands to match mubuf · 97279a8c
  Matt Arsenault authored Nov 29, 2016
  97279a8c
- AMDGPU: Use else if · 437fd71f
  Matt Arsenault authored Nov 29, 2016
  437fd71f
- AMDGPU: Materialize frame index before add · f96eeec0
  Matt Arsenault authored Nov 29, 2016
  f96eeec0
- AMDGPU: Refactor immediate folding logic · ff8bb49b
  Matt Arsenault authored Nov 29, 2016
  ff8bb49b
- AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defined in scalar branches · 0bc68811
  Tom Stellard authored Nov 29, 2016
  0bc68811
Nov 28, 2016
- MachineScheduler: Export function to construct "default" scheduler. · 115efcd3
  Matthias Braun authored Nov 28, 2016
  115efcd3
- [AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies · 0ee250ee
  Stanislav Mekhanoshin authored Nov 28, 2016
  0ee250ee
Nov 26, 2016
- AMDGPU/SI: Use float as the operand type for amdgcn.interp intrinsics · 1473f07c
  Tom Stellard authored Nov 26, 2016
  1473f07c
Nov 25, 2016
- AMDGPU/SI: Add back reverted SGPR spilling code, but disable it · 79c05871
  Marek Olsak authored Nov 25, 2016
  79c05871
- Revert "AMDGPU: Implement SGPR spilling with scalar stores" · e3895bfb
  Marek Olsak authored Nov 25, 2016
  e3895bfb
- Revert "AMDGPU: Fix MMO when splitting spill" · dad553a5
  Marek Olsak authored Nov 25, 2016
  dad553a5
- Revert "AMDGPU: Fix adding extra implicit def of register" · 8cbbf653
  Marek Olsak authored Nov 25, 2016
  8cbbf653
- Revert "AMDGPU: Fix not setting kill flag on temp reg when spilling" · 713e6fc5
  Marek Olsak authored Nov 25, 2016
  713e6fc5
- Revert "AMDGPU: Make m0 unallocatable" · a45dae45
  Marek Olsak authored Nov 25, 2016
  a45dae45
- Revert "AMDGPU: Remove m0 spilling code" · ea848df8
  Marek Olsak authored Nov 25, 2016
  ea848df8
- Revert "AMDGPU: Preserve m0 value when spilling" · 18a95bcb
  Marek Olsak authored Nov 25, 2016
  18a95bcb
Nov 24, 2016
- AMDGPU: Preserve m0 value when spilling · 7b54dd03
  Matt Arsenault authored Nov 24, 2016
  7b54dd03
- TRI: Add hook to pass scavenger during frame elimination · 94b32ffe
  Matt Arsenault authored Nov 24, 2016
  94b32ffe
- AMDGPU: Remove m0 spilling code · 5ee33253
  Matt Arsenault authored Nov 24, 2016
  5ee33253
- AMDGPU: Make m0 unallocatable · 9e5c7b10
  Matt Arsenault authored Nov 24, 2016
  9e5c7b10
Nov 23, 2016
- AMDGPU: Cleanup immediate folding code · a24d84be
  Matt Arsenault authored Nov 23, 2016
  a24d84be
- AMDGPU: Fix debug printing · 391c3ea9
  Matt Arsenault authored Nov 23, 2016
  391c3ea9
- AMDGPU: Fix not setting kill flag on temp reg when spilling · 997a9abf
  Matt Arsenault authored Nov 23, 2016
  997a9abf
- AMDGPU: Fix adding extra implicit def of register · dd0cb2a3
  Matt Arsenault authored Nov 23, 2016
  dd0cb2a3
- AMDGPU: Fix MMO when splitting spill · 2669a76f
  Matt Arsenault authored Nov 23, 2016
  2669a76f
Nov 22, 2016
- [AMDGPU] Fix multiple vreg definitions in si-lower-control-flow · ae0f6620
  Stanislav Mekhanoshin authored Nov 22, 2016
  ae0f6620
Nov 19, 2016
- Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. · 72db2a39
  Daniel Sanders authored Nov 19, 2016
  72db2a39
Nov 18, 2016
- [AMDGPU] Change frexp.exp intrinsic to return i16 for f16 input · aefee42e
  Konstantin Zhuravlyov authored Nov 18, 2016
  aefee42e
- AMDGPU: Fix unused variable warning · afe614cb
  Matt Arsenault authored Nov 18, 2016
  afe614cb
- AMDGPU/SI: Remove zero_extend patterns for i16 ops selected to 32-bit insts · 01e65d2c
  Tom Stellard authored Nov 18, 2016
  01e65d2c
- AMDGPU: Fix legalization of MUBUF instructions in shaders · ce2b589d
  Nicolai Haehnle authored Nov 18, 2016
  ce2b589d
- Fix spelling mistakes in AMDGPU target comments. NFC. · e995a808
  Simon Pilgrim authored Nov 18, 2016
  e995a808
- AMDGPU: Move redundant setting of inst properties · eff1ad8d
  Matt Arsenault authored Nov 18, 2016
  eff1ad8d
- AMDGPU: Fix crash on illegal type for inlineasm · 742deb24
  Matt Arsenault authored Nov 18, 2016
  742deb24
Nov 17, 2016
- Revert "AMDGPU: Enable ConstrainCopy DAG mutation" · 0a1a7b6b
  Konstantin Zhuravlyov authored Nov 17, 2016
  0a1a7b6b
- [AMDGPU] Custom lower f16 = fp_round f64 · d709efb0
  Konstantin Zhuravlyov authored Nov 17, 2016
  d709efb0
- [AMDGPU] Promote f16/i16 conversions to f32/i32 · 3f0cdc7a
  Konstantin Zhuravlyov authored Nov 17, 2016
  3f0cdc7a
- [AMDGPU] Expand `br_cc` for f16 · 662e01df
  Konstantin Zhuravlyov authored Nov 17, 2016
  662e01df