Commits · fcb1061c13c8aee3e3bf6a5da8444d3514defb30 · Roger Ferrer / llvm-epi · GitLab

Oct 07, 2018
- [x86] add vector fmul with undef elts tests; NFC · fcb1061c
  Sanjay Patel authored Oct 07, 2018
  fcb1061c
- [DAGCombiner] allow undef elts in vector fabs/fneg matching · 0b74c840
  Sanjay Patel authored Oct 07, 2018
  0b74c840
- [x86] add tests for FP logic folding for vectors with undefs; NFC · 31a3f2aa
  Sanjay Patel authored Oct 07, 2018
  31a3f2aa
- [SelectionDAG] Respect multiple uses in SimplifyDemandedBits to... · 3b04a4e3
  Simon Pilgrim authored Oct 07, 2018
  3b04a4e3
- [AARCH64][X86] Remove _nonsplat from test names · 012fda59
  Simon Pilgrim authored Oct 07, 2018
  012fda59
- [RISCV] Introduce alu8.ll and alu16.ll tests · 47afe5e7
  Alex Bradbury authored Oct 07, 2018
  47afe5e7
- [X86] getFauxShuffleMask - Handle undef + sentinel values in subvector insertion · 9fa1c664
  Simon Pilgrim authored Oct 06, 2018
  9fa1c664
Oct 06, 2018
- [X86][SSE] Add SSE41 vector int2fp tests · 0dcf1cea
  Simon Pilgrim authored Oct 06, 2018
  0dcf1cea
- [X86] combinePMULDQ - add op back to worklist if SimplifyDemandedBits succeeds on either operand · 62d199f4
  Simon Pilgrim authored Oct 06, 2018
  62d199f4
- [X86] Regenerate LSR loop iteration test · 944c5305
  Simon Pilgrim authored Oct 06, 2018
  944c5305
- [x86] add test for masked store with extra shift op; NFC · 891be5af
  Sanjay Patel authored Oct 06, 2018
  891be5af
- [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simplify PSHUFB masks · 0cc0a24b
  Simon Pilgrim authored Oct 06, 2018
  0cc0a24b
- [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification · 9c9c97bc
  Simon Pilgrim authored Oct 06, 2018
  9c9c97bc
Oct 05, 2018
- [GlobalIsel] Add llvm.invariant.start and llvm.invariant.end · b328d953
  Jessica Paquette authored Oct 05, 2018
  b328d953
- [x86] make blend tests resistant to demanded elements improvements; NFC · f84ece68
  Sanjay Patel authored Oct 05, 2018
  f84ece68
- [RISCV] Regenerate several tests now enableMultipleCopyHints is enabled by default · 90fc1007
  Alex Bradbury authored Oct 05, 2018
  90fc1007
- [X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits. · 0ed892da
  Craig Topper authored Oct 05, 2018
  0ed892da
- [SelectionDAG] allow undefs when matching splat constants · f6a160a1
  Sanjay Patel authored Oct 05, 2018
  f6a160a1
- [x86] add test for (X - 0.0) vector with undef elts; NFC · 8858fa85
  Sanjay Patel authored Oct 05, 2018
  8858fa85
- [X86][SSE] Try to make MOVLPS/MOVHPS(+PD) instructions SimplifyDemandedElts proof · 90947214
  Simon Pilgrim authored Oct 05, 2018
  90947214
- [x86] regenerate full checks; NFC · 00216bca
  Sanjay Patel authored Oct 05, 2018
  00216bca
- [x86] add test for fneg matching failure; NFC · b7d85655
  Sanjay Patel authored Oct 05, 2018
  b7d85655
- [X86][AVX] getFauxShuffleMask - add support for INSERT_SUBVECTOR subvector shuffles · 6c5ab48f
  Simon Pilgrim authored Oct 05, 2018
  6c5ab48f
- AMDGPU/GlobalISel: Add support for G_INTTOPTR · 7c65078f
  Tom Stellard authored Oct 05, 2018
  7c65078f
- [WebAssembly] Saturating arithmetic intrinsics · 4b47d08e
  Thomas Lively authored Oct 05, 2018
  4b47d08e
- [globalisel][combine] When placing truncates, handle the case when the BB is empty · a464ffd5
  Daniel Sanders authored Oct 04, 2018
  a464ffd5
- [WebAssembly] Ignore DBG_VALUE in WebAssemblyCFGStackify pass when looking for block start · 409b4391
  Yury Delendik authored Oct 04, 2018
  409b4391
Oct 04, 2018
- [globalisel][combine] Fix a rare crash when encountering an instruction whose op0 isn't a reg · ab358bfd
  Daniel Sanders authored Oct 04, 2018
  ab358bfd
- AMDGPU: Rename isAmdCodeObjectV2 -> isAmdHsaOrMesa · aa067cb9
  Konstantin Zhuravlyov authored Oct 04, 2018
  aa067cb9
- [globalisel][combine] Improve the truncate placement for the extending-loads combine · a05c7583
  Daniel Sanders authored Oct 04, 2018
  a05c7583
- [x86] add test for SSE sqrtss register dep (PR22206) · 2cf1561f
  Sanjay Patel authored Oct 04, 2018
  2cf1561f
- AArch64: Fix XSeqPairs/WSeqPairs problems · 0c67a4e9
  Matthias Braun authored Oct 04, 2018
  0c67a4e9
- [AMDGPU] Match signed dot4/8 pattern. · 4bc597bf
  Farhana Aleen authored Oct 04, 2018
  4bc597bf
- [X86][AVX] Add PR39161 test case for v4f64 zzww shuffle · 8ba4061d
  Simon Pilgrim authored Oct 04, 2018
  8ba4061d
- [RISCV][NFC] Remove dead CHECK lines from vararg.ll test · a4b7b6da
  Alex Bradbury authored Oct 04, 2018
  a4b7b6da
- [RISCV] Bugfix for floats passed on the stack with the ILP32 ABI on RV32F · e96b7c88
  Alex Bradbury authored Oct 04, 2018
  e96b7c88
- [WebAssembly] Bitselect intrinsic and instruction · 5d461c96
  Thomas Lively authored Oct 03, 2018
  5d461c96
- [mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC · 75727043
  Simon Atanasyan authored Oct 03, 2018
  75727043
Oct 03, 2018
- [X86] PUSH/POP 'mem-mem' instructions are not RMW - these are 2 different addresses · aabd99c2
  Simon Pilgrim authored Oct 03, 2018
  aabd99c2
- [X86][Btver2] Fix MMX PSHUFB schedule · 0b451a29
  Simon Pilgrim authored Oct 03, 2018
  0b451a29