Commits · fd7300f717c18c861e77685efe6f16f12fb63ae7 · Roger Ferrer / llvm-epi · GitLab

Mar 20, 2020
- [llvm-readobj][llvm-readelf][test] - Add a test to check how we dump relocation addends. · 63778bc6
  Georgii Rymar authored Mar 05, 2020
  63778bc6
- Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" · baa6f6a7
  Adrian Kuegel authored Mar 20, 2020
  baa6f6a7
- [ARM] Change VDUP type to i32 for MVE · b3499f57
  David Green authored Mar 20, 2020
  b3499f57
- [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w · 3c24aee7
  Roger Ferrer authored Mar 20, 2020
  3c24aee7
- [NFC][RISCV] Test for 0.0 fp immediate · ebb04e9c
  Roger Ferrer authored Mar 20, 2020
  ebb04e9c
- [InstCombine] Simplify calls with "returned" attribute · 03727687
  Nikita Popov authored Mar 07, 2020
  03727687
- [ARM] Extra MVE float loop tests. NFC · 9cf920e6
  David Green authored Mar 20, 2020
  
  9cf920e6
- [InstCombine] Don't replace musttail result based on known bits · 5c109671
  Nikita Popov authored Mar 19, 2020
  5c109671
- [Matrix] Generalize ColumnMatrixTy to MatrixTy (NFC). · be86bc76
  Florian Hahn authored Mar 20, 2020
  be86bc76
- [DSE] Support traversing MemoryPhis. · 3a8372ed
  Florian Hahn authored Mar 20, 2020
  3a8372ed
- [AMDGPU] Reuse register during frame index elimination · 2cbb8c94
  Austin Kerbow authored Mar 18, 2020
  2cbb8c94
- [AMDGPU] Set the CostPerUse value for vgpr registers. · 728b878d
  cdevadas authored Mar 19, 2020
  728b878d
- Revert "Generate Callee Saved Register (CSR) related cfi directives like .cfi_restore." · a035726e
  Wei Mi authored Mar 19, 2020
  a035726e
- [Coroutines] Fix PR45130 · 032251e3
  Jun Ma authored Mar 18, 2020
  032251e3
- Recommit: CFGDiff: Simplify/common the begin/end implementations to use a common range helper"" · 1c153774
  David Blaikie authored Mar 19, 2020
  1c153774
- [WebAssembly] Support swiftself and swifterror for WebAssembly target · 08670d43
  Yuta Saito authored Mar 19, 2020
  08670d43
- [WebAssembly] SIMD integer abs instructions · 34db3c3a
  Thomas Lively authored Mar 18, 2020
  34db3c3a
- Revert "Cleanup the plumbing for DILineInfoSpecifier. [NFC]" · 6343526d
  Sterling Augustine authored Mar 19, 2020
  6343526d
- [WebAssembly] SIMD bitmask intrinsics and builtin functions · a3f974f3
  Thomas Lively authored Mar 18, 2020
  a3f974f3
- AMDGPU/GlobalISel: Remove leftover #if 0 · 678da7b1
  Matt Arsenault authored Mar 19, 2020
  678da7b1
- Cleanup the plumbing for DILineInfoSpecifier. [NFC] · 98ff6eb6
  Sterling Augustine authored Mar 18, 2020
  98ff6eb6
- [GlobalISel] Port some basic shufflevector undef combines from the DAGCombiner · c9990846
  Jessica Paquette authored Mar 18, 2020
  c9990846
- [ORC] Re-apply 98f2bb44 , enable JITEventListeners in OrcV2, with fixes. · 39253a50
  Lang Hames authored Mar 19, 2020
  39253a50
Mar 19, 2020
- [CMake] Enable the use of -ffile-prefix-map · 8a8778f2
  Petr Hosek authored Mar 11, 2020
  8a8778f2
- [InstSimplify] Add some vector shift tests to show lack of DemandedElts support · 95b6f62e
  Simon Pilgrim authored Mar 19, 2020
  
  95b6f62e
- [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht · f8756366
  Stefan Agner authored Mar 01, 2020
  f8756366
- [Matrix] Fold single-use variable into assert · 1db8b341
  Benjamin Kramer authored Mar 19, 2020
  1db8b341
- [Matrix] Move multiply-add code generation into separate function (NFC). · 796fb2e4
  Florian Hahn authored Mar 19, 2020
  796fb2e4
- [JumpThreading] Fix infinite loop (PR44611) · e23d7865
  Kazu Hirata authored Mar 19, 2020
  e23d7865
- [AMDGPU] Move frame pointer from s34 to s33 · 0e9368cc
  Scott Linder authored Mar 03, 2020
  0e9368cc
- [AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions · 60b1967c
  Scott Linder authored Jan 21, 2020
  60b1967c
- [AMDGPU][NFC] Refactor some uses of unsigned to Register · db099f99
  Scott Linder authored Mar 11, 2020
  db099f99
- [AMDGPU][NFC] Refactor emitEntryFunctionPrologue · 30bb113b
  Scott Linder authored Feb 24, 2020
  30bb113b
- [Matrix] Hoist load/store generation logic, add helpers for tiled access. · 0cc2d237
  Florian Hahn authored Mar 19, 2020
  0cc2d237
- [InstCombine][X86] Tests for variable but in-range vector-by-scalar shift amounts (PR40391) · c2586cab
  Simon Pilgrim authored Mar 19, 2020
  c2586cab
- [InstCombine][X86] simplifyX86immShift - handle variable out-of-range vector... · a11e5b32
  Simon Pilgrim authored Mar 19, 2020
  a11e5b32
- [AArch64][SVE] Add support for DestructiveBinaryImm DestructiveInstType · 018dde4c
  Cameron McInally authored Mar 19, 2020
  018dde4c
- [ORC] Don't use a platform mutex for LLJIT's GenericLLVMIRPlatformSupport class. · 54aec178
  Lang Hames authored Mar 18, 2020
  54aec178
- [ORC] Fix indentation in debugging output. · ad2da631
  Lang Hames authored Mar 18, 2020
  
  ad2da631
- [ORC] Use finer-grained and session locking in MachOPlatform to avoid deadlock. · eb918d8d
  Lang Hames authored Mar 18, 2020
  eb918d8d