Commits · fd7300f717c18c861e77685efe6f16f12fb63ae7 · Roger Ferrer / llvm-epi · GitLab

Mar 20, 2020
- [llvm-readobj][llvm-readelf][test] - Add a test to check how we dump relocation addends. · 63778bc6
  Georgii Rymar authored Mar 05, 2020
  63778bc6
- [ARM] Change VDUP type to i32 for MVE · b3499f57
  David Green authored Mar 20, 2020
  b3499f57
- [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w · 3c24aee7
  Roger Ferrer authored Mar 20, 2020
  3c24aee7
- [NFC][RISCV] Test for 0.0 fp immediate · ebb04e9c
  Roger Ferrer authored Mar 20, 2020
  ebb04e9c
- [InstCombine] Simplify calls with "returned" attribute · 03727687
  Nikita Popov authored Mar 07, 2020
  03727687
- [ARM] Extra MVE float loop tests. NFC · 9cf920e6
  David Green authored Mar 20, 2020
  
  9cf920e6
- [InstCombine] Don't replace musttail result based on known bits · 5c109671
  Nikita Popov authored Mar 19, 2020
  5c109671
- [DSE] Support traversing MemoryPhis. · 3a8372ed
  Florian Hahn authored Mar 20, 2020
  3a8372ed
- [AMDGPU] Reuse register during frame index elimination · 2cbb8c94
  Austin Kerbow authored Mar 18, 2020
  2cbb8c94
- [AMDGPU] Set the CostPerUse value for vgpr registers. · 728b878d
  cdevadas authored Mar 19, 2020
  728b878d
- Revert "Generate Callee Saved Register (CSR) related cfi directives like .cfi_restore." · a035726e
  Wei Mi authored Mar 19, 2020
  a035726e
- [Coroutines] Fix PR45130 · 032251e3
  Jun Ma authored Mar 18, 2020
  032251e3
- [WebAssembly] Support swiftself and swifterror for WebAssembly target · 08670d43
  Yuta Saito authored Mar 19, 2020
  08670d43
- [WebAssembly] SIMD integer abs instructions · 34db3c3a
  Thomas Lively authored Mar 18, 2020
  34db3c3a
- [WebAssembly] SIMD bitmask intrinsics and builtin functions · a3f974f3
  Thomas Lively authored Mar 18, 2020
  a3f974f3
- [GlobalISel] Port some basic shufflevector undef combines from the DAGCombiner · c9990846
  Jessica Paquette authored Mar 18, 2020
  c9990846
Mar 19, 2020
- [InstSimplify] Add some vector shift tests to show lack of DemandedElts support · 95b6f62e
  Simon Pilgrim authored Mar 19, 2020
  
  95b6f62e
- [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht · f8756366
  Stefan Agner authored Mar 01, 2020
  f8756366
- [JumpThreading] Fix infinite loop (PR44611) · e23d7865
  Kazu Hirata authored Mar 19, 2020
  e23d7865
- [AMDGPU] Move frame pointer from s34 to s33 · 0e9368cc
  Scott Linder authored Mar 03, 2020
  0e9368cc
- [AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions · 60b1967c
  Scott Linder authored Jan 21, 2020
  60b1967c
- [InstCombine][X86] Tests for variable but in-range vector-by-scalar shift amounts (PR40391) · c2586cab
  Simon Pilgrim authored Mar 19, 2020
  c2586cab
- [AArch64][SVE] Add support for DestructiveBinaryImm DestructiveInstType · 018dde4c
  Cameron McInally authored Mar 19, 2020
  018dde4c
- [X86] Attempt to more accurately model the cost of a bool reduction of wide vector type. · c13aa36b
  Craig Topper authored Mar 19, 2020
  c13aa36b
- [test] Re-enable accidentally disabled X86 tests · 5e6e545c
  Vedant Kumar authored Mar 19, 2020
  5e6e545c
- [NFC][ARM] Fix for buildbots · 27ef7c6b
  Sam Parker authored Mar 19, 2020
  27ef7c6b
- [InstCombine][X86] simplifyX86immShift - convert variable in-range vector... · 433897da
  Simon Pilgrim authored Mar 19, 2020
  433897da
- [NFC][ARM] Add two tests · d0fb6879
  Sam Parker authored Mar 19, 2020
  d0fb6879
- [PowerPC][AIX] Simplify the check prefixes in the ByVal lit tests. [NFC] · 06c810b1
  Sean Fertile authored Mar 19, 2020
  
  06c810b1
- [obj2yaml][test] - Update test after output change. · fecce903
  Georgii Rymar authored Mar 19, 2020
  fecce903
- [obj2yaml] - SHT_DYNAMIC and SHT_REL* sections: stop dumping sh_entsize field... · a02b3869
  Georgii Rymar authored Mar 16, 2020
  a02b3869
- [obj2yaml] - SHT_REL*, SHT_DYNAMIC sections: add tests to document the... · 9c69cc10
  Georgii Rymar authored Mar 17, 2020
  9c69cc10
- Test commit. · accf06fe
  Kamau Bridgeman authored Mar 19, 2020
  
  accf06fe
- [NFC] Simplify test · 4d8a7202
  Piotr Sobczak authored Mar 19, 2020
  4d8a7202
- [InstCombine][X86] Tests for variable but in-range vector-by-scalar shift amounts (PR40391) · fb114550
  Simon Pilgrim authored Mar 19, 2020
  fb114550
- Reland D73534: [DebugInfo] Enable the debug entry values feature by default · d9b96210
  Djordje Todorovic authored Mar 19, 2020
  d9b96210
- [AArch64][SVE] Rename intrinsics for gather prefetch [NFC] · 0ea4fb5b
  Andrzej Warzynski authored Mar 19, 2020
  0ea4fb5b
- [SCCP] Use constant ranges for PHI nodes. · 4a58996d
  Florian Hahn authored Mar 19, 2020
  4a58996d
- [llvm-dwp] Start error messages with a lowercase letter. · b1c8a378
  Igor Kudrin authored Mar 17, 2020
  b1c8a378
- [ValueTracking] Add computeKnownBits DemandedElts support to ADD/SUB/MUL instructions (PR36319) · 0b458d4d
  Simon Pilgrim authored Mar 19, 2020
  
  0b458d4d