Commits · ff37b1105d6eb7b9a4e4515c2ced95e9837567aa · Roger Ferrer / llvm-epi · GitLab

Oct 22, 2021
- [LegalizeVectorOps][X86] Don't defer BITREVERSE expansion to LegalizeDAG. · ff37b110
  Craig Topper authored Oct 21, 2021
  ff37b110
- [InstCombine] Precommit new and-xor-or.ll tests. NFC. · c0d6e1b9
  Stanislav Mekhanoshin authored Oct 21, 2021
  
  c0d6e1b9
Oct 21, 2021
- [TargetLowering][RISCV] Prevent scalarization of fixed vector bswap. · 458ed5fc
  Craig Topper authored Oct 21, 2021
  458ed5fc
- [AArch64][GlobalISel] Fold 64-bit cmps with 64-bit adds · 5dc339d9
  Jessica Paquette authored Oct 04, 2021
  5dc339d9
- Add test to check we can instcombine after reassociate. NFC. · 969b72fb
  Stanislav Mekhanoshin authored Oct 21, 2021
  969b72fb
- BPF: emit BTF_KIND_DECL_TAG for typedef types · 0472e83f
  Yonghong Song authored Sep 20, 2021
  0472e83f
- [InstCombine] Add additional store forwarding test (NFC) · 8262f45c
  Nikita Popov authored Oct 21, 2021
  8262f45c
- [CodeMetrics] Don't require speculatability for ephemeral values · 18485258
  Nikita Popov authored Oct 19, 2021
  18485258
- [RISCV] Expand scalable vector CTTZ/CTLZ/CTPOP. · d55be79d
  Craig Topper authored Oct 21, 2021
  d55be79d
- [SLP] Add additional tests which caused crashes with versioning. · a4b8979a
  Florian Hahn authored Sep 16, 2021
  
  a4b8979a
- [VectorCombine] fold shuffle-of-binops with common operand · 66d22b4d
  Sanjay Patel authored Oct 21, 2021
  66d22b4d
- [RISCV] Add a test showing incorrect VSETVLI insertion · 92673fad
  Fraser Cormack authored Oct 21, 2021
  92673fad
- [DebugInfo] Support typedef with btf_decl_tag attributes · f6811cec
  Yonghong Song authored Sep 20, 2021
  f6811cec
- [InstCombine] generalize reassociated Demorgan folds · 3888de95
  Sanjay Patel authored Oct 21, 2021
  3888de95
- [InstCombine] add tests for DeMorgan with reassociation; NFC · 6b560a8e
  Sanjay Patel authored Oct 21, 2021
  6b560a8e
- [SystemZ][z/OS] Initial implementation for lowerCall on z/OS · aa3519f1
  Anirudh Prasad authored Oct 21, 2021
  aa3519f1
- [DAGCombiner] fold bit-hack form of usubsat · d2198771
  Sanjay Patel authored Oct 21, 2021
  d2198771
- [SystemZ][z/OS] Additional test coverage for validating dialect instructions for SystemZ · fa111d30
  Anirudh Prasad authored Oct 21, 2021
  fa111d30
- [SLP]Unify vectorization of PHI and store nodes with improved tiny tree vectorization. · 3ea7877c
  Alexey Bataev authored Sep 15, 2021
  3ea7877c
- [SVE] Fix selection failure when splitting extended masked loads · 0d153df6
  Kerry McLaughlin authored Oct 21, 2021
  0d153df6
- [ARM] Add new abs test. NFC · 9bfe7af1
  David Green authored Oct 21, 2021
  
  9bfe7af1
- [SVE][Analysis] Tune the cost model according to the tune-cpu attribute · 9448cdc9
  David Sherwood authored Sep 22, 2021
  9448cdc9
- [NFC][LoopIdiom] Add more test case to runtime-determined memset size · 76db6d80
  eopXD authored Oct 16, 2021
  76db6d80
- [NFC][msan] Add NormalArgAfterNoUndef testcase · 66b650f3
  Vitaly Buka authored Oct 20, 2021
  
  66b650f3
- [NFC][msan] Rerun update_test_checks.py for a test · 60a8db6d
  Vitaly Buka authored Oct 20, 2021
  
  60a8db6d
- [ARM] Use correct name of floating point ceil intrinsic in test. · b75f3dd8
  Craig Topper authored Oct 20, 2021
  b75f3dd8
Oct 20, 2021
- [Tests] Add tests for non-speculatable ephemeral values · 8e4ae603
  Nikita Popov authored Oct 20, 2021
  8e4ae603
- [x86] add special-case lowering for usubsat for AVX512 · 40163f1d
  Sanjay Patel authored Oct 20, 2021
  40163f1d
- [InstCombine] Fold `(a & ~b) & ~c` to `a & ~(b | c)` · b92412fb
  Stanislav Mekhanoshin authored Oct 19, 2021
  b92412fb
- Precommit updated InstCombine/and-xor-or.ll test. NFC. · 3c59cdee
  Stanislav Mekhanoshin authored Oct 20, 2021
  
  3c59cdee
- [IndVars] Invalidate SCEV when IR is changed in rewriteLoopExitValue. · 8977bd58
  Florian Hahn authored Oct 20, 2021
  8977bd58
- [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and x, c2) iff c1 & c2 == 0 · b046eb19
  Jon Roelofs authored Oct 14, 2021
  b046eb19
- [AMDGPU] MachineLICM cannot hoist VALU · c80d8a8c
  Stanislav Mekhanoshin authored Jul 23, 2021
  c80d8a8c
- [AMDGPU] Allow rematerialization of SOP with virtual registers · 61858356
  Stanislav Mekhanoshin authored Sep 24, 2021
  61858356
- [MC] Recursively calculate symbol offset · 5d57578a
  Leonard Grey authored Oct 20, 2021
  5d57578a
- [InstCombine] fold fake vector insert to bit-logic · 80ab06c5
  Sanjay Patel authored Oct 20, 2021
  80ab06c5
- Precommit InstCombine/and-xor-or.ll test. NFC. · 503d061d
  Stanislav Mekhanoshin authored Oct 20, 2021
  
  503d061d
- [WebAssembly] Add prototype relaxed float min max instructions · e1fb1340
  Zhi An Ng authored Oct 20, 2021
  e1fb1340
- [InstCombine] add tests for casted insertelement; NFC · ea9a0556
  Sanjay Patel authored Oct 20, 2021
  
  ea9a0556
- [CodeGenPrepare] Avoid a scalable-vector crash in ctlz/cttz · eabf11f9
  Fraser Cormack authored Oct 20, 2021
  eabf11f9