Commits · ffa2dce59070636e0d83d2797fb80c4ca2d7ea2d · Roger Ferrer / llvm-epi · GitLab

Dec 02, 2020
- [PowerPC] Fix FLT_ROUNDS_ on little endian · ffa2dce5
  Qiu Chaofan authored Dec 02, 2020
  ffa2dce5
- [Test] One CodeGen test showing missing opportunity on move elimination · 16bee4d3
  Max Kazantsev authored Dec 02, 2020
  
  16bee4d3
- [PowerPC] Promote the i1 to i64 for SINT_TO_FP/FP_TO_SINT · 47f784ac
  QingShan Zhang authored Dec 02, 2020
  47f784ac
- [VE] Add vcmp, vmax, and vmin intrinsic instructions · c1762bcf
  Kazushi (Jam) Marukawa authored Dec 01, 2020
  c1762bcf
- Fix typo in testcase runline that got there because I have very bad hands · b6b0a80e
  Jessica Paquette authored Dec 01, 2020
  b6b0a80e
- [AArch64][GlobalISel] Don't write to WZR in non-flag-setting G_BRCOND case · c82f002c
  Jessica Paquette authored Nov 02, 2020
  c82f002c
- [AArch64][GlobalISel] Select Bcc when it's better than TB(N)Z · 6c3fa97d
  Jessica Paquette authored Nov 30, 2020
  6c3fa97d
Dec 01, 2020
- Revert "[FastISel] Flush local value map on ever instruction" and dependent patches · 615f63e1
  David Blaikie authored Dec 01, 2020
  615f63e1
- Let .llvm_bb_addr_map section use the same unique id as its associated .text section. · e0bf2349
  Rahman Lavaee authored Dec 01, 2020
  e0bf2349
- [ARM] Mark select and selectcc of MVE vector operations as expand. · eedf0ed6
  David Green authored Dec 01, 2020
  eedf0ed6
- [DAG] Move vselect(icmp_ult, 0, sub(x,y)) -> usubsat(x,y) to DAGCombine (PR40111) · 1b209ff9
  Simon Pilgrim authored Dec 01, 2020
  1b209ff9
- [VE] Add vmul and vdiv intrinsic instructions · 10b164d2
  Kazushi (Jam) Marukawa authored Dec 01, 2020
  10b164d2
- [X86] Add PR48223 usubsat test case · 00f4269c
  Simon Pilgrim authored Dec 01, 2020
  
  00f4269c
- Remove rm -f cortex-a57-misched-mla.s; hopefully the bots have all cycled past it now · 2ca4785a
  Hans Wennborg authored Dec 01, 2020
  
  2ca4785a
- [DAG] Move vselect(icmp_ult, -1, add(x,y)) -> uaddsat(x,y) to DAGCombine (PR40111) · 6dbd0d36
  Simon Pilgrim authored Dec 01, 2020
  6dbd0d36
- [VE] Add vadd and vsub intrinsic instructions · c3fe6ea2
  Kazushi (Jam) Marukawa authored Nov 27, 2020
  c3fe6ea2
- [AArch64] Update pass pipeline test. NFC · 09d82fa9
  David Green authored Dec 01, 2020
  
  09d82fa9
- [ARM] PREDICATE_CAST demanded bits · 7923d71b
  David Green authored Dec 01, 2020
  7923d71b
- [AArch64][GlobalISel] Fix crash during legalization of a vector G_SELECT with scalar mask. · 87ff1564
  Amara Emerson authored Nov 17, 2020
  87ff1564
Nov 30, 2020
- [FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option · a474657e
  Paul Robinson authored Nov 30, 2020
  a474657e
- [X86] Zero-extend pointers to i64 for x86_64 · cdac34bd
  Harald van Dijk authored Nov 30, 2020
  cdac34bd
- [SelectionDAGBuilder] Update signature of `getRegsAndSizes()`. · f6150aa4
  Francesco Petrogalli authored Nov 30, 2020
  f6150aa4
- [VE] Optimize prologue/epilogue instructions about GOT · 6834b3d6
  Kazushi (Jam) Marukawa authored Nov 23, 2020
  6834b3d6
- [VE] Clean check routines of branch types · 6fe61053
  Kazushi (Jam) Marukawa authored Nov 28, 2020
  6fe61053
- [RISCV] Combine (GORCI (GORCI x, C2), C1) -> (GORCI x, C1|C2). · bfc4f29f
  Craig Topper authored Nov 30, 2020
  bfc4f29f
- [RISCV] Custom legalize bswap/bitreverse to GREVI with Zbp extension to enable... · 76d1026b
  Craig Topper authored Nov 30, 2020
  76d1026b
- [X86] Add vbmi2 test coverage for vector rotations · 8fcc8c31
  Simon Pilgrim authored Nov 30, 2020
  8fcc8c31
- Add 'asserts' requiremnt to test/CodeGen/ARM/cortex-a57-misched-mla.mir · 234a5297
  Dmitri Gribenko authored Nov 30, 2020
  234a5297
- Try harder to get rid off cortex-a57-misched-mla.s · 25d54abc
  Hans Wennborg authored Nov 30, 2020
  
  25d54abc
- [VE] Optimize prologue/epilogue instructions · 686988a5
  Kazushi (Jam) Marukawa authored Nov 26, 2020
  686988a5
- Try to fix bots after 112b3cb6 by removing cortex-a57-misched-mla.s · 273641fe
  Hans Wennborg authored Nov 30, 2020
  
  273641fe
- [VE] Change the behaviour of truncate · 44a679ea
  Kazushi (Jam) Marukawa authored Nov 27, 2020
  44a679ea
- [X86][AVX512] Only lower to VPALIGNR if we have BWI (PR48322) · 83d79ca5
  Simon Pilgrim authored Nov 30, 2020
  
  83d79ca5
- Fix test case · 12952358
  Evgeny Leviant authored Nov 30, 2020
  
  12952358
- [ARM] Constant predicate tests. NFC · d5387c04
  David Green authored Nov 30, 2020
  
  d5387c04
- [TableGen][SchedModels] Fix read/write variant substitution · 112b3cb6
  Evgeny Leviant authored Nov 30, 2020
  112b3cb6
Nov 29, 2020
- [ConstantFold] Fold more operations to poison · 53040a96
  Juneyoung Lee authored Nov 29, 2020
  53040a96
- [BasicAA] Generalize recursive phi alias analysis · e987fbdd
  Nikita Popov authored Nov 21, 2020
  e987fbdd
Nov 28, 2020
- [X86] Add -verify-machineinstrs to pic.ll · 78a30c83
  Harald van Dijk authored Nov 28, 2020
  78a30c83
- [RISCV] Add tests for existing (rotr (bswap X), (i32 16))->grevi pattern for... · 6ee22ca6
  Craig Topper authored Nov 27, 2020
  6ee22ca6