Commits · ffa4dfc8de526ba28d12d62a14f984a7e1e9224b · Roger Ferrer / llvm-epi · GitLab

Feb 22, 2022
- [AArch64][SME] Remove term 'streaming-sve' from assembler diagnostics. · ffa4dfc8
  Sander de Smalen authored Feb 22, 2022
  ffa4dfc8
- Add DriverKit support · 3a1cb362
  Egor Zhdan authored Jan 24, 2022
  3a1cb362
- [VE] Split unsupported v512.32 ops · 4fd77129
  Simon Moll authored Feb 22, 2022
  4fd77129
- [SVE] Add isel patterns for SABA/UABA. · 25ed2ab3
  Paul Walker authored Feb 14, 2022
  25ed2ab3
- [x86] add load folding restriction to pushAddIntoCmovOfConsts() · ad7214f2
  Sanjay Patel authored Feb 22, 2022
  ad7214f2
- [AMDGPU] Fix typo in comment [NFC] · 380ff31d
  Thomas Symalla authored Feb 22, 2022
  380ff31d
- [LoopVectorize] Support conditional in-loop vector reductions · 12fb133e
  Kerry McLaughlin authored Feb 22, 2022
  12fb133e
- [MergeICmps] Don't call comesBefore() if in different blocks (PR53959) · 3c0096a1
  Nikita Popov authored Feb 22, 2022
  3c0096a1
- [SCEV] Do not erase LoopUsers. PR53969 · ad3b1fe4
  Max Kazantsev authored Feb 22, 2022
  ad3b1fe4
- [AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern. · d6a9eec2
  Sunho Kim authored Feb 22, 2022
  d6a9eec2
- Fix warning introduced by 47eff645 · dc065727
  David Sherwood authored Feb 22, 2022
  
  dc065727
- [InstCombine] Bail out of load-store forwarding for scalable vector types · 47eff645
  David Sherwood authored Feb 21, 2022
  47eff645
- [GlobalStatus] Keep Visited set in isSafeToDestroyConstant() · f8d72100
  Nikita Popov authored Feb 22, 2022
  f8d72100
- [RISCV] Add patterns for vector widening integer reduction instructions · 5acd9c49
  Jianjian GUAN authored Jan 19, 2022
  5acd9c49
- [OpenMP] Ensure offloading sections do not have SHF_ALLOC flag · 456ffd7a
  Joseph Huber authored Feb 21, 2022
  456ffd7a
- [MachineOutliner][AArch64] NFC: Split MBBs into "outlinable ranges" · d97f997e
  Jessica Paquette authored Feb 16, 2022
  d97f997e
- [AMDGPU] Remove redundand check in the SILoadStoreOptimizer · dc098156
  Stanislav Mekhanoshin authored Feb 21, 2022
  dc098156
Feb 21, 2022
- [RISCV] Optimize tail agnostic vmv.s.x which don't need to select tail value. · f7dfc5d1
  Zakk Chen authored Feb 21, 2022
  f7dfc5d1
- [NFC][DAGCombine] Use isOperandOf() in combineCarryDiamond · df0c16ce
  Paweł Bylica authored Feb 21, 2022
  df0c16ce
- [RISCV] Teach shouldSinkOperands to sink splat operands of vp.fma intrinsics. · 90d24055
  Craig Topper authored Feb 21, 2022
  90d24055
- [MemCpyOpt] Check all access for MemoryUses in writtenBetween. · 7662d168
  Florian Hahn authored Feb 21, 2022
  7662d168
- [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors · 9fc1a0dc
  David Green authored Feb 21, 2022
  9fc1a0dc
- MIR: Start diagnosing too many operands on an instruction · 9c7ca51b
  Matt Arsenault authored Feb 18, 2022
  9c7ca51b
- Fix llvm-objcopy shared lib build · 14f143c9
  Sven van Haastregt authored Feb 21, 2022
  14f143c9
- [SCEV][NFC] Replace contains+insert check with insert.second · 40d06c4c
  Max Kazantsev authored Feb 21, 2022
  
  40d06c4c
- [DAG] visitBSWAP - pull out repeated SDLoc. NFC · 46f1e835
  Simon Pilgrim authored Feb 21, 2022
  46f1e835
- [llvm-objcopy][COFF] Fix section name encoding · ddf528b7
  Nicolas Miller authored Feb 19, 2022
  ddf528b7
- [COFF] Move section name encoding into BinaryFormat · 85f4023e
  Nicolas Miller authored Feb 19, 2022
  85f4023e
- Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares." · 55c181a6
  Florian Hahn authored Feb 21, 2022
  55c181a6
- [AMDGPU] SILoadStoreOptimizer: avoid unbounded register pressure increases · 359a792f
  Jay Foad authored Jan 28, 2022
  359a792f
- [StableHashing] Hash vregs with multiple defs · 9a547e70
  Jay Foad authored Feb 18, 2022
  9a547e70
- [VE] v512i1 mask arithmetic isel · cf964eb5
  Simon Moll authored Feb 21, 2022
  cf964eb5
- [ARM] Remove unused lowerABS function. NFC · a6fb1bb3
  Craig Topper authored Feb 20, 2022
  a6fb1bb3
- [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs... · 440c4b70
  Craig Topper authored Feb 20, 2022
  440c4b70
- [STATEPOINT] Mark LR is early-clobber implicit def. · 7f2293ba
  Serguei Katkov authored Feb 18, 2022
  7f2293ba
- [ISEL] remove unnecessary getNode(); NFC · efe5b8ad
  Chen Zheng authored Feb 17, 2022
  efe5b8ad
- [RISCV][NFC] Add sched for some instructions in Zb extension · 4abe4845
  Lian Wang authored Feb 21, 2022
  4abe4845
- [SDAG] enable binop identity constant folds for sub · 67ef6313
  Luo, Yuanke authored Feb 18, 2022
  67ef6313
Feb 20, 2022
- DebugInfo: Add an assert about cross-unit references in dwo units · 323c6727
  David Blaikie authored Feb 20, 2022
  323c6727
- [llvm] Add missind dep on Symbolize to Debuginfod · 6694491a
  Yannic Bonenberger authored Feb 20, 2022
  6694491a