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  1. Feb 10, 2020
    • Max Moroz's avatar
      [compiler-rt] Some clean up / refactoring in sanitizer_symbolizer_libcdep.cpp. · 5ad62d3b
      Max Moroz authored
      Summary:
      Nothing critical, just a few potential improvements I've noticed while reading
      the code:
      - return `false` when symbolizer buffer is too small to read all data
      - invert some conditions to reduce indentation
      - prefer `nullptr` over `0` for pointers; init some pointers on stack;
      - remove minor code duplication
      
      Reviewers: eugenis, vitalybuka
      
      Subscribers: dberris, #sanitizers, llvm-commits, kcc
      
      Tags: #sanitizers, #llvm
      
      Differential Revision: https://reviews.llvm.org/D74137
      5ad62d3b
    • James Henderson's avatar
      [DebugInfo] Reject line tables of version > 5 · b1c7bfe6
      James Henderson authored
      If a debug line section with version of greater than 5 is encountered,
      prior to this change the parser would accept it and treat it as version
      5. This might work to some extent, but then it might not at all, as it
      really depends on the format of the unspecified future version, which
      will be different (otherwise there would be no point in changing the
      version number). Any information we could provide has a good chance of
      being invalid, so we should just refuse to parse such tables.
      
      Reviewed by: dblaikie, MaskRay
      
      Differential Revision: https://reviews.llvm.org/D74204
      b1c7bfe6
    • James Henderson's avatar
      [NFC] Fix line endings · cd37f0ad
      James Henderson authored
      cd37f0ad
    • Bill Wendling's avatar
      1c2241a7
    • Luke Geeson's avatar
      [AArch64] Make Read Write System Registers Read Only · a67db836
      Luke Geeson authored
      This patch makes the following System Registers Read Only:
      
       - CurrentEL
       - ICH_MISR_EL2
       - PMBIDR_EL1
       - PMSIDR_EL1
      
      as found in:
      https://developer.arm.com/docs/ddi0595/e/aarch64-system-registers
      
      Relative line numbers were also added to the tests so we get more
      informative error messages on failure.
      
      Change-Id: I963b4f01ca5737b58f9e8e7abe9ca1d99e328758
      a67db836
    • Richard Smith's avatar
      CWG2445: For function template partial ordering, take reversal of · fcea7fbd
      Richard Smith authored
      function arguments into account when forming P/A pairs.
      fcea7fbd
    • Sebastian Neubauer's avatar
      [SelectionDAG] Optimize build_vector of truncates and shifts · 7cddd15e
      Sebastian Neubauer authored
      Add a simplification to fuse a manual vector extract with shifts and
      truncate into a bitcast.
      
      Unpacking and packing values into vectors is only optimized with
      extractelement instructions, not when manually unpacked using shifts
      and truncates.
      This patch simplifies shifts and truncates into a bitcast if possible.
      
      Simplify (build_vec (trunc $1)
                          (trunc (srl $1 width))
                          (trunc (srl $1 (2 * width))) ...)
      to (bitcast $1)
      
      Differential Revision: https://reviews.llvm.org/D73892
      7cddd15e
    • Alex Zinenko's avatar
      [mlir] use unpacked memref descriptors at function boundaries · 5a177805
      Alex Zinenko authored
      The existing (default) calling convention for memrefs in standard-to-LLVM
      conversion was motivated by interfacing with LLVM IR produced from C sources.
      In particular, it passes a pointer to the memref descriptor structure when
      calling the function. Therefore, the descriptor is allocated on stack before
      the call. This convention leads to several problems. PR44644 indicates a
      problem with stack exhaustion when calling functions with memref-typed
      arguments in a loop. Allocating outside of the loop may lead to concurrent
      access problems in case the loop is parallel. When targeting GPUs, the contents
      of the stack-allocated memory for the descriptor (passed by pointer) needs to
      be explicitly copied to the device. Using an aggregate type makes it impossible
      to attach pointer-specific argument attributes pertaining to alignment and
      aliasing in the LLVM dialect.
      
      Change the default calling convention for memrefs in standard-to-LLVM
      conversion to transform a memref into a list of arguments, each of primitive
      type, that are comprised in the memref descriptor. This avoids stack allocation
      for ranked memrefs (and thus stack exhaustion and potential concurrent access
      problems) and simplifies the device function invocation on GPUs.
      
      Provide an option in the standard-to-LLVM conversion to generate auxiliary
      wrapper function with the same interface as the previous calling convention,
      compatible with LLVM IR porduced from C sources. These auxiliary functions
      pack the individual values into a descriptor structure or unpack it. They also
      handle descriptor stack allocation if necessary, serving as an allocation
      scope: the memory reserved by `alloca` will be freed on exiting the auxiliary
      function.
      
      The effect of this change on MLIR-generated only LLVM IR is minimal. When
      interfacing MLIR-generated LLVM IR with C-generated LLVM IR, the integration
      only needs to require auxiliary functions and change the function name to call
      the wrapper function instead of the original function.
      
      This also opens the door to forwarding aliasing and alignment information from
      memrefs to LLVM IR pointers in the standrd-to-LLVM conversion.
      5a177805
    • James Henderson's avatar
      [DebugInfo][test] Replace pre-canned binary test · 1dc62d03
      James Henderson authored
      The DebugInfo/dwarfdump-invalid-line-table test used a pre-canned binary
      generated by a fuzzer to demonstrate a bug fix. Unfortunately, the
      binary is rigid and requires hand-editing if we change behaviour, such
      as rejecting certain properties within it (as I plan on doing in another
      change).
      
      Rather than hand-edit the binary, I have replaced it with two tests. The
      first tests the high-level code path from the debug line parser that
      produces the same error as this test previously did, and the second is a
      set of unit test cases that comprehensively cover the
      FormValue::skipValue method, which in turn covers the area that the
      original bug fix touched.
      
      Reviewed by: MaskRay, dblaikie
      
      Differential Revision: https://reviews.llvm.org/D74202
      1dc62d03
    • Kai Nacke's avatar
      [SystemZ] Add implementation for the intrinsic llvm.read_register · 34946dfd
      Kai Nacke authored
      This change implements the llvm intrinsic llvm.read_register for
      the SystemZ platform which returns the value of the specified
      register
      (http://llvm.org/docs/LangRef.html#llvm-read-register-and-llvm-write-register-intrinsics).
      This implementation returns the value of the stack register, and
      can be extended to return the value of other registers. The
      implementation for this intrinsic exists on various other platforms
      including Power, x86, ARM, etc. but missing on SystemZ.
      
      Reviewers: uweigand
      
      Differential Revision: https://reviews.llvm.org/D73378
      34946dfd
    • Hans Wennborg's avatar
      Fix an unused variable warning · ea9850b6
      Hans Wennborg authored
      ea9850b6
    • Georgii Rymar's avatar
      [llvm-readobj] - Change the error to warning when a section name is unknown. · 0378afc4
      Georgii Rymar authored
      We reported the error in this case.
      But it was asked (https://reviews.llvm.org/D73193#inline-665595) to convert it
      to a warning. This patch does it.
      
      Differential revision: https://reviews.llvm.org/D74047
      0378afc4
    • Mikael Holmen's avatar
    • Louis Dionne's avatar
      [libc++][span] Add failing tests for span::first and span::last · f2af4f8a
      Louis Dionne authored
      Both methods have compile time constraints that we should test against.
      
      Patch by Michael Schellenberger Costa
      
      Differential Revision: https://reviews.llvm.org/D71999
      f2af4f8a
    • Kadir Cetinkaya's avatar
      [OpenMP] Fix unused variable · bb504542
      Kadir Cetinkaya authored
      bb504542
    • Nico Weber's avatar
      [gn build] make 'clang' target depend on libcxx/include on mac · 3dc47979
      Nico Weber authored
      On macOS, libc++ headers are distributed with the compiler, not
      the sysroot. Without this, compiling a file that includes something
      like <string> won't compile with gn-built clang without manual tweaks.
      
      I used to do the manual tweaks, but now that other people are starting
      to use this on mac, let's make it Just Work.
      
      (This is marginally nicer than the cmake build now in that you can
      just build 'clang' and it'll do the right thing.)
      
      Differential Revision: https://reviews.llvm.org/D74247
      3dc47979
    • Louis Dionne's avatar
      [libc++] Protect <span> against min/max macro · 1ac44d9f
      Louis Dionne authored
      Patch by Corentin Jabot
      Differential Revision: https://reviews.llvm.org/D73855
      1ac44d9f
    • Florian Hahn's avatar
    • Kerry McLaughlin's avatar
      [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic · 92a78750
      Kerry McLaughlin authored
      Summary:
      Adds the following SVE2 intrinsics:
       - cadd & sqcadd
       - cmla & sqrdcmlah
       - saddlbt, ssublbt & ssubltb
      
      Reviewers: sdesmalen, dancgr, efriedma, cameron.mcinally, c-rhodes, rengolin
      
      Reviewed By: sdesmalen
      
      Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D73636
      92a78750
    • Simon Pilgrim's avatar
      Revert rGe82e17d4d4cac8b2df00094e80d5e1cb22795664 - [X86] Add lowerShuffleAsBitRotate (PR44379) · 39eade73
      Simon Pilgrim authored
      As noted on PR44379, we didn't attempt to lower vector shuffles using bit rotations on XOP/AVX512F targets.
      
      This patch lowers to uniform ISD:ROTL nodes - ROTR isn't supported by XOP and they are interchangeable for constant values anyway.
      
      There might be cases where targets without ISD:ROTL support would benefit from this (expanding to SRL+SHL+OR), which I'll investigate in a future patch.
      
      Also, non-AVX512BW targets fail to concatenate 256-bit rotations back to 512-bits (split during shuffle lowering as they don't have v32i16/v64i8 types).
      ---
      Internal shuffle tests indicate theres a bug somewhere that I haven't been able to track down yet.
      39eade73
    • Raphael Isemann's avatar
      [lldb][NFC] Don't hide a bool in LibCxxOptional's OptionalFrontend::m_size · 2a3ef377
      Raphael Isemann authored
      m_size can only be 1 or 0 and indicates if the optional has a value. Calling
      it 'm_size', giving it a size_t data type and then also comparing indices against
      'size' is very confusing. Let's just make this a bool.
      2a3ef377
    • Florian Hahn's avatar
      [DSE] Add first version of MemorySSA-backed DSE (Bottom up walk). · d0c4d4fe
      Florian Hahn authored
      This patch adds a first version of a MemorySSA based DSE. It is missing
      a lot of features, which will get added as follow-ups, to help to keep
      the review manageable.
      
      The patch uses the following general approach: given a MemoryDef, walk
      upwards to find clobbering MemoryDefs that may be killed by the
      starting def. Then check that there are no uses that may read the
      location of the original MemoryDef in between both MemoryDefs. A bit
      more concretely:
      
      For all MemoryDefs StartDef:
      1. Get the next dominating clobbering MemoryDef (DomAccess) by walking upwards.
      2. Check that there no reads between DomAccess and the StartDef by checking
         all uses starting at DomAccess and walking until we see StartDef.
      3. For each found DomDef, check that:
        1. There are no barrier instructions between DomDef and StartDef (like
           throws or stores with ordering constraints).
        2. StartDef is executed whenever DomDef is executed.
      3. StartDef completely overwrites DomDef.
      4. Erase DomDef from the function and MemorySSA.
      
      The patch uses a very simple approach to guarantee that no throwing
      instructions are between 2 stores: We only allow accesses to stack
      objects, access that are in the same basic block if the block does not
      contain any throwing instructions or accesses in functions that do
      not contain any throwing instructions. This will get lifted later.
      
      Besides adding support for the missing cases, there is plenty of additional
      potential for improvements as follow-up work, e.g. the way we visit stores
      (could be just a traversal of the MemorySSA, rather than collecting them
      up-front), using the alias information discovered during walking to optimize
      the MemorySSA.
      
      This is loosely based on D40480 by Dave Green.
      
      Reviewers: dmgreen, rnk, efriedma, bryant, asbirlea, Tyker
      
      Reviewed By: asbirlea
      
      Differential Revision: https://reviews.llvm.org/D72700
      d0c4d4fe
    • Raphael Isemann's avatar
    • Raphael Isemann's avatar
      [lldb][NFC] Fix code style of LibcxxVariantIndexValidity · 97212121
      Raphael Isemann authored
      Enum cases aren't all uppercase.
      97212121
    • Raphael Isemann's avatar
    • Kerry McLaughlin's avatar
      [AArch64][SVE] SVE2 intrinsics for character match & histogram generation · e299a081
      Kerry McLaughlin authored
      Summary:
      Implements the following intrinsics:
       - @llvm.aarch64.sve.histcnt
       - @llvm.aarch64.sve.histseg
       - @llvm.aarch64.sve.match
       - @llvm.aarch64.sve.nmatch
      
      Reviewers: c-rhodes, sdesmalen, dancgr, efriedma, rengolin
      
      Reviewed By: c-rhodes
      
      Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D74117
      e299a081
    • Kirill Bobyrev's avatar
      [clangd] Support renaming designated initializers · 9f6d8de2
      Kirill Bobyrev authored
      Summary:
      Clangd does not find references of designated iniitializers yet and, as a
      result, is unable to rename such references. This patch addresses this issue.
      
      Resolves: https://github.com/clangd/clangd/issues/247
      
      Reviewers: sammccall
      
      Reviewed By: sammccall
      
      Subscribers: merge_guards_bot, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
      
      Tags: #clang
      
      Differential Revision: https://reviews.llvm.org/D72867
      9f6d8de2
    • Kerry McLaughlin's avatar
      [AArch64][SVE] Add SVE2 intrinsics for widening DSP operations · 5e1d7bb6
      Kerry McLaughlin authored
      Summary:
      Implements the following intrinsics:
      
       - @llvm.aarch64.sve.[s|u]abalb
       - @llvm.aarch64.sve.[s|u]abalt
       - @llvm.aarch64.sve.[s|u]addlb
       - @llvm.aarch64.sve.[s|u]addlt
       - @llvm.aarch64.sve.[s|u]sublb
       - @llvm.aarch64.sve.[s|u]sublt
       - @llvm.aarch64.sve.[s|u]abdlb
       - @llvm.aarch64.sve.[s|u]abdlt
       - @llvm.aarch64.sve.sqdmullb
       - @llvm.aarch64.sve.sqdmullt
       - @llvm.aarch64.sve.[s|u]mullb
       - @llvm.aarch64.sve.[s|u]mullt
      
      Reviewers: sdesmalen, dancgr, efriedma, cameron.mcinally, rengolin
      
      Reviewed By: sdesmalen
      
      Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D73719
      5e1d7bb6
    • Florian Hahn's avatar
      [DSE] Add tests for MemorySSA based DSE. · da52b9c1
      Florian Hahn authored
      This copies the DSE tests into a MSSA subdirectory to test the MemorySSA
      backed DSE implementation, without disturbing the original tests.
      
      Differential Revision: https://reviews.llvm.org/D72145
      da52b9c1
    • Frank Laub's avatar
      [MLIR][Affine] NFC: Move AffineValueMap and MutableAffineMap · a248fa90
      Frank Laub authored
      Summary:
      The `AffineValueMap` is moved into `Dialect/AffineOps` to prevent a cyclic
      dependency between `Analysis` and `Dialect/AffineOps`.
      
      Reviewers: bondhugula, herhut, nicolasvasilache, rriddle, mehdi_amini
      
      Reviewed By: rriddle, mehdi_amini
      
      Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D74277
      a248fa90
    • Richard Smith's avatar
      Fix handling of destructor names that name typedefs. · 76f888d0
      Richard Smith authored
      1) Fix a regression in llvmorg-11-init-2485-g0e3a4877840 that would
      reject some cases where a class name is shadowed by a typedef-name
      causing a destructor declaration to be rejected. Prefer a tag type over
      a typedef in destructor name lookup.
      
      2) Convert the "type in destructor declaration is a typedef" error to an
      error-by-default ExtWarn to allow codebases to turn it off. GCC and MSVC
      do not enforce this rule.
      76f888d0
    • Djordje Todorovic's avatar
      [CSInfo] Fix the assertions regarding updating the CSInfo · 3a4dc577
      Djordje Todorovic authored
      The call site info was not updated correctly when deleting
      corresponding call instructions.
      
      Differential Revision: https://reviews.llvm.org/D73700
      3a4dc577
    • Simon Moll's avatar
      [Doc] Proposal for vector predication · c49b9e0d
      Simon Moll authored
      Summary:
      Proposal and roadmap towards vector predication in LLVM.
      This patch documents that
      a) It is recognized that current LLVM is ill-equipped for vector predication.
      b) The community is working on a solution.
      c) A concrete prototype exists in the VP extension (D57504).
      
      Reviewers: rkruppe, rengolin, cameron.mcinally, SjoerdMeijer, andrew.w.kaylor, craig.topper, sdesmalen, k-ishizaka, lattner, fhahn
      
      Reviewed By: andrew.w.kaylor
      
      Subscribers: rogfer01, merge_guards_bot, simoncook, s.egerton, llvm-commits, efocht
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D73889
      c49b9e0d
    • Jan Kratochvil's avatar
      [lldb] Fix+re-enable Assert StackFrame Recognizer on Linux · 1a39f1b9
      Jan Kratochvil authored
      D73303 was failing on Fedora Linux and so it was disabled by Skip the
      AssertFrameRecognizer test for Linux.
      
      I find no easy way how to find out if it gets recognized as
      `__assert_fail` or `__GI___assert_fail` as during `Process` ctor
      libc.so.6 is not yet loaded by the debuggee.
      
      DWARF symbol `__GI___assert_fail` overrides the ELF symbol `__assert_fail`.
      While external debug info (=DWARF) gets disabled for testsuite (D55859)
      that sure does not apply for real world usage.
      
      Differential Revision: https://reviews.llvm.org/D74252
      1a39f1b9
    • Martin Storsjö's avatar
    • Kai Nacke's avatar
      [SytemZ] Disable vector ABI when using option -march=arch[8|9|10] · a5040d5e
      Kai Nacke authored
      When specifying -march=arch[8|9|10], those CPU types do NOT support
      the vector extension. In this case the vector ABI must be disabled.
      The generated data layout should NOT contain 64-v128.
      
      Reviewers: uweigand
      
      Differential Revision: https://reviews.llvm.org/D74146
      a5040d5e
    • Djordje Todorovic's avatar
      [CSInfo] Use isCandidateForCallSiteEntry() when updating the CSInfo · 68908993
      Djordje Todorovic authored
      Use the isCandidateForCallSiteEntry().
      This should mostly be an NFC, but there are some parts ensuring
      the moveCallSiteInfo() and copyCallSiteInfo() operate with call site
      entry candidates (both Src and Dest should be the call site entry
      candidates).
      
      Differential Revision: https://reviews.llvm.org/D74122
      68908993
    • Jan Kratochvil's avatar
      [lldb] [doc] Change sample commands prefix from > to $ · d2e0fee7
      Jan Kratochvil authored
      Remove all beginning > from the sample commands as my accidental
      copy-paste (multiple times...) will discard ./bin/llvm-lit which is
      difficult to rebuild (I have to rm -rf and cmake it all again).
      
      Differential Revision: https://reviews.llvm.org/D74296
      d2e0fee7
    • Raphael Isemann's avatar
      [lldb] Refactored TestCallOverriddenMethod.py to general virtual function test · ea2af727
      Raphael Isemann authored
      This actually tests all the different situations in which we can call virtual
      functions. This removes also all skipIfs as the first skipIf for Linux is
      apparently fixed and the second skipIf was just failing due to the constructor
      call (which should be its own test and not be tested here).
      ea2af727
    • Sebastian Neubauer's avatar
      [AMDGPU] Add a16 feature to gfx10 · 87568691
      Sebastian Neubauer authored
      Based on D72931
      
      This adds a new feature called A16 which is enabled for gfx10.
      gfx9 keeps the R128A16 feature so it can share all the instruction encodings
      with gfx7/8.
      
      Differential Revision: https://reviews.llvm.org/D73956
      87568691
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