Commits · 061a94e4e28551662e3c70e312475580d0c9184e · Lorenzo Albano / LLVM bpEVL · GitLab

Dec 14, 2019
- [NFC][llvm][MIRVRegNamerUtils] Refactoring GetHashableMO into switch-statement. · 816985c1
  Puyan Lotfi authored Dec 14, 2019
  816985c1
- [Legalizer] Making artifact combining order-independent · 8731799f
  Roman Tereshin authored Dec 12, 2019
  8731799f
- [Legalizer] Refactoring out legalizeMachineFunction · 18bf9670
  Roman Tereshin authored Dec 12, 2019
  18bf9670
- [Legalizer] More detailed debugging printing in main loop · 8207c815
  Roman Tereshin authored Dec 12, 2019
  
  8207c815
Dec 13, 2019
- [NFC] Use SelectionDAG::getMemBasePlusOffset() instead of getNode(ISD::ADD) · 11448eeb
  Alex Richardson authored Dec 13, 2019
  11448eeb
- [NFC] Implement SelectionDAG::getObjectPtrOffset() using getMemBasePlusOffset() · fc83f53a
  Alex Richardson authored Dec 13, 2019
  fc83f53a
- [NFC] Add a SDValue overload for SelectionDAG::getMemBasePlusOffset() · ea8888d1
  Alex Richardson authored Dec 13, 2019
  ea8888d1
- [NFC] Change SelectionDAG::getMemBasePlusOffset() to use int64_t · d9bb70ac
  Alex Richardson authored Dec 13, 2019
  d9bb70ac
- [DAGCombiner] fold shift-trunc-shift to shift-mask-trunc (2nd try) · 2f0c7fd2
  Sanjay Patel authored Dec 13, 2019
  2f0c7fd2
- Reland [DataLayout] Fix occurrences that size and range of pointers are assumed to be the same. · 97572775
  Nicola Zaghen authored Dec 13, 2019
  97572775
- [NFC] Use EVT instead of bool for getSetCCInverse() · be15dfa8
  Alex Richardson authored Dec 13, 2019
  be15dfa8
- Recommit "[AArch64][SVE] Implement intrinsics for non-temporal loads & stores" · 4194ca8e
  Kerry McLaughlin authored Dec 11, 2019
  4194ca8e
- [LiveDebugValues] Omit entry values for DBG_VALUEs with pre-existing expressions · 5c7cc6f8
  David Stenberg authored Dec 13, 2019
  5c7cc6f8
- [LegalizeTypes] Remove unnecessary if before calling ReplaceValueWith on the... · 5c80a4f4
  Craig Topper authored Dec 13, 2019
  5c80a4f4
- Temporarily revert "NFC: DebugInfo: Refactor RangeSpanList to be a struct,... · a8154e5e
  Eric Christopher authored Dec 12, 2019
  a8154e5e
- NFC: DebugInfo: Refactor RangeSpanList to be a struct, like DebugLocStream::List · 8e048962
  David Blaikie authored Dec 12, 2019
  8e048962
- NFC: DebugInfo: Refactor debug_loc/loclist emission into a common function · 20e06a28
  David Blaikie authored Dec 12, 2019
  20e06a28
- hwasan: add tag_offset DWARF attribute to optimized debug info · dabd2622
  Evgenii Stepanov authored Nov 25, 2019
  dabd2622
Dec 12, 2019
- Revert "[DAGCombiner] fold shift-trunc-shift to shift-mask-trunc" · 94329371
  Sanjay Patel authored Dec 12, 2019
  94329371
- [DAGCombiner] fold shift-trunc-shift to shift-mask-trunc · 8963332c
  Sanjay Patel authored Dec 12, 2019
  8963332c
- [DAGCombiner] improve readability · b39009bf
  Sanjay Patel authored Dec 12, 2019
  b39009bf
- [DebugInfo] Prevent invalid fragments at ISel from dropping debug info · e39e2b4a
  stozer authored Dec 10, 2019
  e39e2b4a
- Temporarily Revert "[DataLayout] Fix occurrences that size and range of... · f798eb21
  Nicola Zaghen authored Dec 12, 2019
  f798eb21
- [DataLayout] Fix occurrences that size and range of pointers are assumed to be the same. · 5f620877
  Nicola Zaghen authored Dec 02, 2019
  5f620877
- [NFC][llvm][MIRVRegNamerUtils] Moving methods around. Making some private. · 756db63a
  Puyan Lotfi authored Dec 12, 2019
  756db63a
- [llvm][MIRVRegNamerUtils] Adding hashing on memoperands. · f5b7a468
  Puyan Lotfi authored Dec 11, 2019
  f5b7a468
- [IR] Split out target specific intrinsic enums into separate headers · 5d986953
  Reid Kleckner authored Dec 11, 2019
  5d986953
- Revert "[DWARF] Allow cross-CU references of subprogram definitions" · 56232f95
  Vedant Kumar authored Dec 11, 2019
  56232f95
Dec 11, 2019
- Revert "[SDAG] remove use restriction in isNegatibleForFree() when called from... · cdf5cfea
  Sanjay Patel authored Dec 11, 2019
  cdf5cfea
- [LegalizeTypes] In SoftenFloatRes_FP_EXTEND, move the check for input already... · 4b452952
  Craig Topper authored Dec 11, 2019
  4b452952
- [SDAG] remove use restriction in isNegatibleForFree() when called from getNegatedExpression() · d1f0bdf2
  Sanjay Patel authored Dec 11, 2019
  d1f0bdf2
- Revert "[AArch64][SVE] Implement intrinsics for non-temporal loads & stores" · c0a3ab36
  Kerry McLaughlin authored Dec 11, 2019
  c0a3ab36
- [AArch64][SVE] Implement intrinsics for non-temporal loads & stores · 3f5bf35f
  Kerry McLaughlin authored Dec 11, 2019
  3f5bf35f
- [ARM][LowOverheadLoops] Remove dead loop update instructions. · d97cf1f8
  Sjoerd Meijer authored Dec 11, 2019
  d97cf1f8
- [ARM][TypePromotion] Enable by default · ee757940
  Sam Parker authored Dec 11, 2019
  ee757940
- [PowerPC] [CodeGen] Use MachineBranchProbabilityInfo in EarlyIfPredicator to... · 1408e7e1
  shkzhang authored Dec 11, 2019
  1408e7e1
- [LiveRegUnits] Add phys_regs_and_masks iterator range (NFC). · 11f31187
  Florian Hahn authored Dec 11, 2019
  11f31187
- [LegalizeTypes] Remove manual worklist management from SoftenFloatRes_FP_EXTEND. · d4345636
  Craig Topper authored Dec 10, 2019
  d4345636
- Revert "[DebugInfo] Refactored macro related generation, added a test case for... · caa41209
  Nico Weber authored Dec 10, 2019
  caa41209
- [llvm][MIRVRegNamerUtil] Adding hashing against MachineInstr flags. · f364686f
  Puyan Lotfi authored Dec 10, 2019
  f364686f